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Vivado基础实验
通过用vivado完成一个流水灯项目手把手教你如何使用vivado,内容十分详细。(Using vivado to complete a running light project, you can learn how to use vivado by hand. The content is very detailed.)
- 2018-12-06 16:14:45下载
- 积分:1
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多周期CPU设计 Verilog源码
本文件是用Verilog编写的多周期CPU的源码,文件里面含有CPU的连线图,用modesim编写,并且在Quartus II 下仿真通过,本代码将对初学者有很大的参考价值,欢迎大家下载!
- 2022-02-05 05:11:14下载
- 积分:1
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FPGA
数字钟的VHDL语言程序,包含了好几个模块,是毕业设计的优秀程序,值得下载!(VHDL language program of digital clock, contains several modules, is an excellent program, graduation design is worth to download!)
- 2015-08-31 21:07:44下载
- 积分:1
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robot_7_31
使用Verilog HDL来控制机器人,六个高精密舵机,舵机运动非常流畅,舵机不抖动(FPGA to control the robot servo, six servos)
- 2012-12-07 11:11:02下载
- 积分:1
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8b10b
ALERA fpga 8B10B转换源码,用于实现8B转10B,10B转8B功能。(ALTERA fpga 8B10B conversion source, used to achieve 8B to 10B, 10B to 8B function)
- 2020-09-13 02:07:59下载
- 积分:1
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rtl_DRAM
本程式為使用Verilog語言寫控制DRAM的控制模塊, 可以簡易的控制DRAM IC, 本程式已經過系統驗證.(program for the use of the Verilog language to write the control of DRAM control module, be easy to control DRAM IC, the program has been systematically verified.)
- 2006-12-05 11:31:42下载
- 积分:1
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clock
EDA用maxplus2开发设计的简易数字钟,适合初学者,vhdL语言(EDA maxplus2 in development and design of simple digital clock, is suitable for beginners, vhdL language
)
- 2011-10-03 20:50:23下载
- 积分:1
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fft
FPGA实现FFT算法的源代码及工程文件,此工程为ISE工程项目。有详细的说明,可以运行。(FPGA Implementation of FFT algorithm source code and project files, this works for the ISE project. There are detailed instructions, you can run.)
- 2013-10-12 17:21:32下载
- 积分:1
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Buffer-DAQ
基于研华采集卡的FIFO双缓存区高速数据采集(FIFO DAQ)
- 2015-01-11 19:09:49下载
- 积分:1
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FPGA-design-and-application
已经正式出版,西安电子科技大学出版社,FPGA设计及应用,作者褚振勇(Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong)
- 2009-06-03 15:57:31下载
- 积分:1