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04_uart_test
说明: 基于FPGA,用verilog hdl语言实现串口收发实验(Based on FPGA, using Verilog HDL language to achieve serial port transceiver experiment)
- 2021-03-14 13:43:49下载
- 积分:1
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08_4_hdmi_loop
HDMI做为视频输出输入接口已经广泛使用很长时间,主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验,来练习视频的时序和视频颜色的表示,为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)
- 2020-06-17 09:00:02下载
- 积分:1
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FPGA基于PCIE的DMA测试
利用ISE工具,完成对v6系列的FPGA上PCIE以及DMA数据测试仿真,可以通过编译产生仿真波形,也可以根据自己的开发板烧录到自己的板子上
- 2023-08-18 13:05:05下载
- 积分:1
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74-Hamming-code-encoder-and-decoder
基于VHDL实现(7,4)汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)
- 2011-06-09 20:47:07下载
- 积分:1
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interpolate4
调制信号后4倍内插的verilog代码,用于基带成型滤波器输入数据(4 times after modulation signal interpolation verilog code, used to baseband shaping filter input data)
- 2017-04-20 15:52:09下载
- 积分:1
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UMC_90nm_1P9M_LOGIC_MIXED_MODE_Process_TLR_V1.1
UMC 90nm design kit. please read before using thee models.
- 2013-02-02 11:24:38下载
- 积分:1
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AVR_Core.tar
CPLD例程(语言)《Verilog HDL数字控制系统设计实例》AVR_Core.tar.gz-.rar(CPLDprogram dialogue /Verilog language design examples)
- 2011-11-12 20:43:49下载
- 积分:1
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RS232协议的fpga实现
RS232协议的fpga实现,工业应用中可以灵活的应用ps2协议设备,并且可以快速修改,本协议是采用verilog实现的。
- 2022-07-25 23:39:57下载
- 积分:1
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7_ImageEnhance
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像增强处理,平滑,锐化,滤波(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image enhancement, smoothing, sharpening, filtering)
- 2020-10-20 21:07:24下载
- 积分:1
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fir48
48阶FIR滤波器的verilog,包含测试文件(48-order FIR filter verilog, including test paper)
- 2021-04-14 19:58:55下载
- 积分:1