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det
double edfe trigger d latch
- 2014-01-07 19:55:29下载
- 积分：1
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eeprom
实现I2C协议下EEPROM存储的数据读写控制(Under I2C protocol to achieve read and write data stored in EEPROM control)
- 2014-03-05 20:24:21下载
- 积分：1
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SDRAM
verilog编写的SDRAM实验，有串口调试助手和相关资料！！！！！！！！！！！！！！！！！！！！！(Verilog prepared by the SDRAM experiment, a serial debugging assistant and related information!!!!!!!!!!!!!!!!!!!!!)
- 2014-09-13 11:24:46下载
- 积分：1
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PWM
使用VerilogHDL语言加上IP核产生PWM调制波，占空比和频率可调。(The PWM modulation wave, duty cycle and frequency can be adjusted by using VerilogHDL language and IP kernel..)
- 2015-06-05 10:29:28下载
- 积分：1
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基于Nios II开发板的VGA控制器的DE1控制…
基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
- 2023-07-07 19:50:03下载
- 积分：1
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供大家学习以太网VHDL和Verilog代码
以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn
- 2022-08-21 10:09:17下载
- 积分：1
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RISC CPU IP CORE can be used to direct the development and application of the pr...
RISC CPU IP CORE
可以用于直接的工程开发应用
有详细的说明书-RISC CPU IP CORE can be used to direct the development and application of the project has a detailed brochure
- 2023-02-24 21:15:03下载
- 积分：1
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testbench
说明： altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。(altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.)
- 2010-04-22 10:20:24下载
- 积分：1
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yunchengxu
说明： 内附几十种小程序，有状态机、比较器、波形发生器、乘法器、加法器、步进电机控制器等，希望大家能用的上。(Containing dozens of small programs, for reference，This is about FPGA,a tool ,we can study,but in ourselves.)
- 2010-04-29 16:00:25下载
- 积分：1
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taxivalue
我用FPGA来实现，这是一个出租车计价器，用来计算里程，我已在Quartus 2实现。(I used the FPGA to achieve, this is a taxi meter, calculate the mileage, I have been in quartus 2 to achieve.)
- 2020-07-12 19:08:52下载
- 积分：1
