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yiweijicunq
16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器,实际具有环形移位的功能,是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时,输入信号的最低位移位到最高位,其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分:1
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Quadrature Deshifrator
这个
- 2022-06-29 04:52:15下载
- 积分:1
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《Verilog HDL 程序设计教程》3
《Verilog HDL 程序设计教程》3-"Verilog HDL Design Guide" 3
- 2023-02-08 02:25:03下载
- 积分:1
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Listingprogram1
listing program clock
- 2012-11-26 03:31:42下载
- 积分:1
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fpga-fft
xlinx fpga实现fft功能,利用ip核,包含源程序及完整工程文件,直接就能使用(The fft function xlinx fpga ip-core contains the source code and complete the project file, and can be used directly)
- 2013-02-22 10:37:47下载
- 积分:1
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VGA_test
vga很好的学习材料,测试程序,欢迎下载(vga good learning materials, testing procedures, please download)
- 2010-08-17 22:32:45下载
- 积分:1
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Xilinx的FPGA开发DEMO例程,功能相对来说比较全面,适合新手参考。...
Xilinx的FPGA开发DEMO例程,功能相对来说比较全面,适合新手参考。-Xilinx FPGA development DEMO routines, function relatively comprehensive reference suitable for novice.
- 2022-02-21 21:55:12下载
- 积分:1
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Xilinx公司Accel DSP项目
xilinx accel dsp实例项目工程-xilinx accel dsp project
- 2023-03-09 20:10:02下载
- 积分:1
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IIR
利用dsp builder设计的IIR滤波器,已经验证完全可以使用,只需要把其中系数改变。内含VHDL代码(Design IIR filters by dsp builder have been verified , just change the coffetions including VHDL code.)
- 2020-12-02 19:59:26下载
- 积分:1
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利用VHDL实现CPLD(EPM240T100C5)的串口发送程序
利用VHDL实现CPLD(EPM240T100C5)的串口发送程序-Using VHDL realize CPLD (EPM240T100C5) Serial sending procedures
- 2022-12-18 02:35:03下载
- 积分:1