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circuit_timing
verilog延时电路的不同写法,和综合能否。可对比学习(Different wording verilog delay circuit, and comprehensive ability. Comparable learning)
- 2014-05-14 18:02:44下载
- 积分:1
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DIATAL_MATLAB_FPGA_AlteraVerilog
[数字通信同步技术的MATLAB与FPGA实现——AlteraVerilog版]书中资源代码,非常好,分享,
希望大家下下!( U651 u0B3 u09108 u09108 u0103 u0101 u7801 uFF0C u975E u5HR U597D uFF0C u5206 u4EAB uFF0C u5E0C u671B u5927 u5BB6 u4E0B u4E0B uFF01)
- 2017-05-11 13:47:58下载
- 积分:1
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z80_latest.tar
Vhdl design z80 for altera users
- 2013-04-24 14:47:01下载
- 积分:1
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本例为电子琴VHDL程序原代码,电子琴,可实现基本功能
本例为电子琴VHDL程序原代码,电子琴,可实现基本功能-In this case the procedures for organ VHDL source code, organ, can realize the basic functions of
- 2022-03-23 15:59:38下载
- 积分:1
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ML605板子上的灯
ML605评估板上的流水灯,可以实现每隔0.16秒进行+1操作
#include
#include
#include
#include
#include
int main()
{
char a[] = "-100" ;
char b[] = "123" ;
int c ;
c = atoi( a ) + atoi( b ) ;
printf("c = %d
", c) ;
return 0;
- 2022-06-01 23:28:16下载
- 积分:1
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lab4showTAs
4 seg display, button debouncer, and controller for parking meter
- 2010-11-10 16:17:42下载
- 积分:1
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shuzishizhong
基于DE2-115开发板设计的一个数字钟,能进行正常的小时、分、秒计时功能,并分别由开发板上面的数码管显示秒(60s)、分(60min)、小时(24hours)的时间。并具有手动调整时间的功能(DE2-115 board design based on a digital clock, and enables the normal hours, minutes, seconds chronograph function, and were above the development board digital display seconds (60s), points (60min), hours (24hours) time . And has a function to manually adjust the time)
- 2020-11-01 11:39:54下载
- 积分:1
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Driver-for--Agilent
本程序用以驱动安捷伦频谱仪和脉冲信号发生器,以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)
- 2013-01-17 15:28:20下载
- 积分:1
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my_uart
一个简单的UART串口程序,能实现数据的发送与接收,但没有奇偶校验等验证数据传输是否正确。(A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.)
- 2011-08-17 20:48:11下载
- 积分:1
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14_SDRAM
说明: 高速流水的SDRAM控制器,最高速度可达速度在200M左右(high speed SDRAM controller)
- 2019-06-17 18:43:54下载
- 积分:1