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1
说明: 一个解决除法溢出的例子,可以学习到很多,注释很详细(A solution to the division overflow example, you can learn a lot, very detailed notes)
- 2013-12-24 09:19:13下载
- 积分:1
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A VHDL source code for testing the digits and the switches on a spartan 3 basys...
A VHDL source code for testing the digits and the switches on a spartan 3 basys board
- 2023-06-18 08:35:04下载
- 积分:1
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counter
本例源代码文件由用户按照书中的操作步骤自己生成,“Example-2-1Project_Navigator_Demo源代码”目录下为源代码的参考文件。“Example-2-1Project_Navigator_Democounter”目录下为完整的工程,包括源代码文件、综合与实现的结果文件、ISE工程文件等,可以使用ISE工程管理器打开工程,供读者参考(In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source code files, integrated with the realization of the outcome document, ISE project file, etc. You can use ISE Project Manager, open the project for the reader is referred to)
- 2009-09-19 13:53:10下载
- 积分:1
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quartus-mult
mult,在quartusII中,以模块输入形式,仿真乘法器mult,得到时序图和功能图(a simulation example of mult)
- 2012-10-17 14:22:11下载
- 积分:1
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JOP内核字节码获取,很难找的东东,呕血之作
JOP内核字节码获取,很难找的东东,呕血之作-JOP core byte code access, it is difficult to find the price. Zhi for hematemesis
- 2023-01-27 11:00:03下载
- 积分:1
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按键控制的状态机代码
根据按键控制状态机状态转换,内含仿真波形文件
- 2022-06-14 11:16:49下载
- 积分:1
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IOLED
基于单片机显示原理的IO和LED显示原理(Based on the principle of IO chip and LED display shows the principle)
- 2011-09-02 17:09:24下载
- 积分:1
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基于FPGA(VHDL)的LCD1602液晶显示程序
本工程中实现的是FPGA控制的LCD1602液晶显示屏的控制程序,实现了LCD1602液晶显示屏上显示一个四位十进制的频率,其中的频率产生模块在另一个程序中出现,没有在该模块中体现,但是仍能清楚到看到LCD1602的控制过程
- 2023-02-01 15:55:04下载
- 积分:1
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CME3000FPGADevelopment-
针对京微雅阁的CME300 FPGA教程,里面有几个例程,并附有源代码,初学者可尽快入门。(For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.)
- 2013-08-19 18:01:21下载
- 积分:1
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password
verilog代码实现的数字密码锁。通过4个并行的10位移位寄存器,分别记录在时钟上升沿时A,B,C,D的输入情况,比如某上升沿输入A,相应时刻A对应的移位寄存器输入1,其他三个移位寄存器输入都为0.另外4个并行的10位寄存器记录密码。这样,密码锁不仅可以识别字符数量,还可以判断出字符的输入次序。(verilog code of digital lock. By four parallel 10-bit shift register, respectively, recorded in the clock rising edge A, B, C, D of inputs, such as a rising edge of input A, the corresponding moments A 1 corresponding to the input shift register, the other three shift bit register inputs are 0. another four parallel 10-bit registers record the password. This lock can not only identify the number of characters, you can also determine the character of the input sequence.)
- 2011-10-18 21:45:45下载
- 积分:1