登录
首页 » VHDL » 4X4键盘密码比较模块,可以查看密码6

4X4键盘密码比较模块,可以查看密码6

于 2022-10-12 发布 文件大小:136.08 kB
0 51
下载积分: 2 下载次数: 1

代码说明:

4X4 KEYPAD 的密码比较模块,可以核对6位的密码-4x4 KEYPAD password comparison module, can check the password 6

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • polynomial_compute
    我自己当初用来求解arctan 暂时没有搞成ip形式 搞好了还要传git 这个代码还没有搞好,因为急需要下载东西 如果感兴趣可以联系我 邮件(this is a not full wrappered code very crude use chebyshev to caculate arctan function i m urgent to download a model from pudn so i do this.)
    2019-05-31 23:25:00下载
    积分:1
  • FPGA设计的I2C总线控制器的MASTER端的程序
    FPGA设计的I2C总线控制器的MASTER端的程序-FPGA Design of I2C Bus Controller MASTER-side procedures
    2022-03-14 08:16:35下载
    积分:1
  • 11-07-11
    AD9910实现脉冲内线性调频信号,仅供参考(AD9910 to achieve linear FM pulse signal, for reference only)
    2013-09-16 10:52:00下载
    积分:1
  • VHDL硬件描述语言与数字逻辑电路设计
    VHDL硬件描述语言与数字逻辑电路设计-VHDL hardware description language and digital logic circuit design
    2023-03-10 23:05:04下载
    积分:1
  • dingshi
    定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
    2013-07-27 10:34:41下载
    积分:1
  • verilog 编写基于SRAM(CY7C1041)的代码
    verilog 编写基于SRAM(CY7C1041)的代码-Verilog prepared based on the SRAM (CY7C1041) code
    2022-07-05 00:16:39下载
    积分:1
  • The time of the year undergraduate graduate design, signal generator and frequen...
    当年本科时的毕业设计,信号发生器和频率计-The time of the year undergraduate graduate design, signal generator and frequency counter
    2023-08-01 18:30:02下载
    积分:1
  • Electronic code lock procedure, enter the correct password, the lock will open,...
    电子密码锁程序,密码输入正确之后,锁就打开,如果输入的三次的密码不正确,就锁定按键3秒钟,同时发现报警声-Electronic code lock procedure, enter the correct password, the lock will open, if entered incorrect password three times, on the lock button 3 seconds, also found the sound alarm
    2022-07-19 14:11:19下载
    积分:1
  • FIFO
    This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
    2013-10-04 00:41:42下载
    积分:1
  • QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...
    QuartusII简介手册+中文版 本手册针对的读者是 Quartus II 软件的初学者,它概述了可编程逻辑设计中 Quartus II 软件的功能。 不过,本手册并不是 Quartus II 软件的详尽参考手 册。 相反,本手册只是一本指导书,它解释软件的功能以及显示这些功能如 何帮助您进行 FPGA 和 CPLD 设计。-QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus II software for beginners, it provides an overview of programmable logic design in Quartus II software. However, this manual is not the Quartus II software, a detailed reference manual. Instead, this manual is a guide book, which explained the functions of the software and show how these features help you to FPGA and CPLD design.
    2022-07-12 19:32:51下载
    积分:1
  • 696518资源总数
  • 104298会员总数
  • 46今日下载