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Digital-clock
数字时钟6位数码管显示。主要器件为74ls48和74ls160 /74ls161。功能:1.显示时、分、秒。2. 可以24小时制或12小时制。3. 具有校时功能(Digital clock six digital tube display. Main components of 74ls48 and 74ls160/74ls161. Features: 1. Shows hours, minutes, seconds. (2) a 24-hour or 12-hour clock. 3 a school function)
- 2013-07-18 18:11:44下载
- 积分:1
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FIR100
说明: 基于FIR设计的100阶数字滤波器,选择的矩形窗(100 - order digital filter based on FIR)
- 2020-03-06 16:20:41下载
- 积分:1
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pc104vhdl_change
PC104总线的CPLD代码,调试已经通过,可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering
示例用法:)
- 2013-08-29 12:07:43下载
- 积分:1
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ofdm
这是OFDM调制matlab的程序,中间详细描述了调制的过程,希望对大家有用。(This is the OFDM modulation matlab procedures, a detailed description of the intermediate modulation process, I hope useful.)
- 2013-09-26 16:20:42下载
- 积分:1
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lacp
lacp代码,可以参照学习Lacp协议的相关状态机等知识(LACP code, can refer to the relevant state machine learning knowledge of Lacp protocol)
- 2014-12-09 17:14:11下载
- 积分:1
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LED
说明: 一个走马灯的程序,可以按照要求一个一个往后面按顺序点亮(A program for the lantern can be lit one by one according to the requirements.)
- 2019-06-28 15:18:09下载
- 积分:1
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FPGA-design-of-wavelet-filter
基于Verilog的小波滤波器程序设计的总结文档。(Verilog based wavelet filter program design summary document.)
- 2016-03-09 11:19:24下载
- 积分:1
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PID
说明: 利用Verilog语言实现PID增量式控制,输出占空比(Using Verilog language to realize PID incremental control and output duty cycle)
- 2020-04-24 10:06:59下载
- 积分:1
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LIP6903CORE_CSC_RGB2YUV
CSC RGB2YUV Verilog source code
- 2011-02-28 20:06:13下载
- 积分:1
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LCD1602
通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)
- 2013-08-04 13:12:05下载
- 积分:1