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74ls138-integral-4-wire-encoder-16
74ls138组成16..4线编码器 经过本人验证(74ls138 composed of 16 .. 4 line encoder after I verify)
- 2011-09-20 19:00:59下载
- 积分:1
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1、 利用FLEX10的片内RAM资源,根据DDS原理,设计产生正弦信号的各功能模块和顶层原理图; 2、 利用实验板上的TLC7259转换器,将1中得到的正弦信...
1、 利用FLEX10的片内RAM资源,根据DDS原理,设计产生正弦信号的各功能模块和顶层原理图; 2、 利用实验板上的TLC7259转换器,将1中得到的正弦信号,通过D/A转换,通过ME5534滤波后在示波器上观察; 3、 输出波形要求: 在输入时钟频率为16KHz时,输出正弦波分辨率达到1Hz; 在输入时钟频率为4MHz时,输出正弦波分辨率达到256Hz; 4、 通过RS232C通信,实现FPGA和PC机之间串行通信,从而实现用PC机改变频率控制字,实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
- 2022-01-25 19:12:14下载
- 积分:1
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详细介绍了VHDL的28个程序。从简单到复杂。介绍详细
详细介绍了VHDL的28个程序。从简单到复杂。介绍详细-Details of the 28 procedures VHDL. From simple to complex. Detailed introduction
- 2022-07-24 10:14:53下载
- 积分:1
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fft_ex1
基于verilog的FFT设计,使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)
- 2021-02-24 23:39:39下载
- 积分:1
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用CPLD驱动扬声器实现音乐的播放,程序是用VERILOG写的,
用CPLD驱动扬声器实现音乐的播放,程序是用VERILOG写的,-CPLD driver speakers with music player, the program is written in VERILOG,
- 2022-03-20 12:37:01下载
- 积分:1
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FIFO
FIFO的源代码,对FIFO设计有帮助,有借鉴意义,帮助学习VHDL编程(FIFO of the source code, on the FIFO design help, there is reference to help learn VHDL programming)
- 2008-04-29 09:00:11下载
- 积分:1
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FPGA
基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)
- 2013-03-08 17:09:29下载
- 积分:1
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SZ-VHDL
系统数字逻辑电路设计方法以及示例的介绍,分析较好,有价值(System digital logic circuit design methods and introduce examples, analyze good and valuable)
- 2014-03-30 08:34:05下载
- 积分:1
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paper7
分数阶Unscented卡尔曼滤波器研究.pdf(Fractional Unscented Kalman filter pdf)
- 2012-12-27 21:00:41下载
- 积分:1
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fifo
FPGA的fifo与dsp的emif接口测试程序(EMIF interface test program for FIFO and DSP of FPGA)
- 2020-12-03 16:59:25下载
- 积分:1