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74-Hamming-code-encoder-and-decoder
基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)
- 2011-06-09 20:47:07下载
- 积分：1
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四位除法器的VHDL源程序
四位除法器的VHDL源程序-four division of VHDL source
- 2022-01-27 20:04:11下载
- 积分：1
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verilog_DATA_displays
使用verilog语言，滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog" string code and instructions)
- 2014-01-16 10:49:55下载
- 积分：1
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《CPLDFPGA verilog DA0832调控
verilog da0832 cpldfpga control-verilog da0832 cpldfpga control
- 2022-12-07 05:55:03下载
- 积分：1
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VHDL 2008 A reference book on VHDL
VHDL 2008 A reference book on VHDL-VHDL 2008 A reference book on VHDL
- 2022-02-07 15:24:00下载
- 积分：1
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3Code_for_Medx
3x3中值滤波器的FPGA实现现(VERILOG)可直接使用。
(3x3 median filter FPGA implementation of the present (VERILOG) can be used directly.)
- 2012-07-30 00:49:45下载
- 积分：1
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BCD-counter
一个2位的BCD码十进制加法计数器电路，输入为时钟信号CLK，进位
输入信号CIN，每个BCD码十进制加法计数器的输出信号为D、C、B、A和进位输出信号COUT，输入时钟信号CLK用固定时钟，进位输入信号CIN.
(A 2-bit BCD code decimal adder counter circuit input as the clock signal CLK, a carry input signal CIN, D, C, B, A, and the carry output signal COUT, each BCD code decimal adder counter' s output signal, the input clock signal CLK Fixed clock, binary input signal CIN.)
- 2020-10-28 19:29:58下载
- 积分：1
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pps_ketiao_rb2
说明： FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)
- 2020-06-20 17:00:02下载
- 积分：1
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fpga_dk_ps2_vga
ps2 vga interface in vhdl code
- 2011-11-08 11:09:35下载
- 积分：1
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0_09_uart_tx
说明： 在FPGA板卡上面，通过单个按键实现串口的发送功能，带仿真需要自行修改一下工程配置(On the FPGA board, the sending function of the serial port is realized by a single key, and the engineering configuration needs to be modified by the simulation)
- 2020-03-26 08:40:39下载
- 积分：1
