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自适应均衡器
自适应均衡器
- 2022-07-13 15:30:18下载
- 积分:1
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STM32启动代码
利用GPIO口模拟I2C通信,驱动富士通MB85RC系列铁电存储器 ** 支持的型号:MB85RC64/64V,MB85RC128/128V,不支持MB85RC16/16V(The master inputs the device address word (8 bits) following the start condition, and then the slave outputs)
- 2019-07-05 10:19:50下载
- 积分:1
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波特率选择VHDL源代码没有错误调试
波特率可供选择的vhdl源程序,已调试无错误-Baud rate options VHDL source code has no error debug
- 2022-04-25 04:22:33下载
- 积分:1
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TLC2543
使用Verilog实现的AD采样,很有用的!(Implemented using Verilog AD sampling, very useful!)
- 2020-11-18 15:59:39下载
- 积分:1
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uart
说明: fpga串口收发完整程序,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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EDA
十进制计算机,实现十进制计数功能,简单可靠(vhdl)
- 2009-12-26 21:45:43下载
- 积分:1
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THU微纳电子系ic设计课程大作业CNN
说明: THU微纳电子系ic设计课程大作业,使用verilog实现CNN加速器,含一层卷积和池化,仿真通过。(a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed)
- 2020-07-06 20:18:57下载
- 积分:1
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FPGA
基于FPGA的VHDL编程实现各种音频信号,采用的是周立功公司的fusion_startkit开发板。-FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.
- 2022-07-15 20:29:13下载
- 积分:1
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FPGA_Timing_Constraints_byCamp
简要地说明时序约束的内容,对入门级的朋友相当起到引导的作用(Briefly describes the content of timing constraints on entry-level friends rather play a guiding role)
- 2013-10-30 23:20:53下载
- 积分:1
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该代码在信令模块MK50H27 CPLD第七满足(Xilinx 95144)罗…
该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
- 2023-05-01 09:05:04下载
- 积分:1