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my_kmp_matching
说明: KMP算法的Verilog HDL实现,模式串从模块的外部输入,计算next函数,然后进行KMP匹配。有仿真。环境为Quartus II 8.0 Web Edition。(Verilog HDL implementation KMP algorithm, pattern string from the module' s external input, calculate next function, then KMP matching. A simulation. Environment for the Quartus II 8.0 Web Edition.)
- 2011-03-14 09:28:01下载
- 积分:1
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CORDIC_ATAN
使用verilog语言完成了基于cordic算法求反正切的计算,精度为8次迭代(Verilog language used to complete based on CORDIC algorithm for arctangent calculation, an accuracy of 8 iterations)
- 2008-12-24 11:31:00下载
- 积分:1
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基于Verilog的数码管模拟扫描程序,分为两种显示方式,一种是数码管逐个显示,另一个是所有数码管一起显示。...
基于Verilog的数码管模拟扫描程序,分为两种显示方式,一种是数码管逐个显示,另一个是所有数码管一起显示。-Verilog-based digital control analog scanning procedures, two types of display, a digital control-by-show, and the other is with all digital tube display.
- 2022-02-22 11:51:58下载
- 积分:1
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polynomial_compute
我自己当初用来求解arctan 暂时没有搞成ip形式 搞好了还要传git 这个代码还没有搞好,因为急需要下载东西 如果感兴趣可以联系我 邮件(this is a not full wrappered code very crude use chebyshev to caculate arctan function i m urgent to download a model from pudn so i do this.)
- 2019-05-31 23:25:00下载
- 积分:1
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sy3
说明: 多路信号复用基带系统的建模与设计,按位同步复接并掌握四路同步复接器的VHDL设计及系统的时序仿真。(library ieee
use ieee.std_logic_1164.all
use ieee.std_logic_unsigned.all
)
- 2010-04-08 13:01:56下载
- 积分:1
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myuart
使用verilog语言编写的异步串口模块,带有16级深的FIFO,它与DSP28335的SCI相似,可以帮助初学者更快地理解FPGA和DSP的硬件结构和编程思路(Use verilog language of asynchronous serial port module, FIFO with deep level 16, it was similar with DSP28335 SCI, can help beginners to understand faster the FPGA and DSP hardware structure and programming ideas)
- 2013-07-25 11:45:57下载
- 积分:1
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dds
基于FPGA,利用vhdl语言结合matlab工具实现dds,已经仿真(Based on FPGA, VHDL language with matlab tools to achieve DDS, has simulation)
- 2013-04-22 15:36:08下载
- 积分:1
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QC_LDPC_FPGA
LDPC QC-LDPC 基于FPGA的QC-LDPC实现 论文(LDPC QC-LDPC FPGA-based QC-LDPC detailed implementation steps
Thesis)
- 2021-04-08 09:29:00下载
- 积分:1
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amba3-vip-master
说明: All AMBA bus protocols - AXI3, AXI4, AXI4-Lite, ACE, AHB
- 2021-01-11 10:08:49下载
- 积分:1
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VHDL语言写的波形发生器和sine波形发生器
VHDL语言写的波形发生器和sine波形发生器,一共两个文件,通信开发平台专用。这是一个典型的正玄波发生器程序和一个任意波形发生器程序,大家可以参考学习,对于vhdl入门还是很有帮助的-This
is a typical wave generator Shogen procedures and an arbitrary waveform
generator procedures, Members can take a learning portal for VHDL or
helpful
- 2022-05-29 18:31:54下载
- 积分:1