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h_adder
ise13.2环境下VHDL编写的半加器器+仿真波形(ise13.2 environment half adder in VHDL simulation waveform control+)
- 2013-06-01 13:40:03下载
- 积分:1
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AD9361_ZYNQ_PL
说明: ZYNQ FPGA XC7Z035纯verilog配置AD9361 基于VIVADO2016.4工程(ZYNQ FPGA XC7Z035 Pure Verilog Configuration AD9361 Based on VIVADO 2016.4 Project)
- 2021-01-04 12:18:54下载
- 积分:1
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key_liangzhu
梁祝音乐verilog code --适用于QUATUS II 开发环境下,适合于verilog入门学员(the verilog code of liangzhu )
- 2013-04-25 15:19:58下载
- 积分:1
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SD-Host-Controller-master
说明: sd卡的verilog代码,包含一些sd卡例程(SD card Verilog code, including some SD card routines)
- 2021-04-29 13:48:42下载
- 积分:1
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ad9226
说明: ad 9226 数据采集芯片的 FPGA 实现,FPGA 对数据的采集准确,通过仿真和实测(The FPGA implementation of ad9226 data acquisition chip,FPGA data acquisition accuracy, through simulation and measurement.)
- 2020-01-12 19:08:30下载
- 积分:1
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FIR_poroje
this project is about FIR FIlter By VHdl codes in the ISE.
- 2013-09-29 19:25:16下载
- 积分:1
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基于IIC的EEPROM模型代码
说明: 基于IIC协议的EEPROM模型,可实现串行数据转并行数据,并行数据转串行数据,分为EEPROM模块,EEPROM_WR模块,signal模块,Top模块(The EEPROM model based on IIC protocol can convert serial data to parallel data and parallel data to serial data. It is divided into EEPROM module and EEPROM module_ WR module, signal module, top module)
- 2020-10-02 00:30:24下载
- 积分:1
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Dac714
dac714的控制程序,包括spi数据通信,转换控制(dac714 control procedures, including the spi data communications, switching control)
- 2011-05-18 09:13:59下载
- 积分:1
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sqr
VHDL CODE FOR SQUARE WAVE GENERATOR
- 2014-01-22 17:14:20下载
- 积分:1
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wcdma_reciever
本代码仿真了WCDMA小区搜索。cell_search_cpich scramble wcdmasource(This code emulation WCDMA cell search. cell_search_cpich scramble wcdmasource)
- 2020-11-24 16:39:34下载
- 积分:1