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util_gmii_to_rgmii
说明: rgmii代码编写,实现rgmii接口功能,可进行参考设计(The rgmii code is written to realize the function of rgmii interface, which can be used for reference design)
- 2021-03-18 10:19:20下载
- 积分:1
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vhdl 数字时钟设计
资源描述
VHDL语言是一种用于电路设计的高级语言。它在80年代的后期出现。最初是由美国国防部开发出来供美军用来提高设计的可靠性和缩减开发周期的一种使用范围较小的设计语言
现在利用vhdl语言,通过原件例化语句,来编写一个数字时钟
- 2022-02-15 16:13:59下载
- 积分:1
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VHDL basic arithmetic library, a very handy! !
VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
- 2023-01-24 20:00:03下载
- 积分:1
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此程序基于ADC0809,它是CMOS的8位A/D转换器,片内有8路模拟开关,可控制8个模拟量中的一个进入转换器中。...
此程序基于ADC0809,它是CMOS的8位A/D转换器,片内有8路模拟开关,可控制8个模拟量中的一个进入转换器中。-Connection between ADC 0809, it was the eight CMOS A/D converters. Tablets containing eight analog switches, control eight of analog converters enter a Chinese.
- 2023-07-11 04:50:03下载
- 积分:1
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MD5
哈希算法FPGA实现代码,采用MD5算法,并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)
- 2020-07-03 00:40:02下载
- 积分:1
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手把手教你学FPGA 语法篇
编程规范是重中之重,带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)
- 2018-03-10 20:49:51下载
- 积分:1
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用VHDL写的运动计时表程序,用Modelsim仿真已经通过,帖出来与大家分享。...
用VHDL写的运动计时表程序,用Modelsim仿真已经通过,帖出来与大家分享。-write VHDL campaign time table program, Modelsim simulation has been passed, Tie up share with you.
- 2022-01-26 05:57:13下载
- 积分:1
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fir-filter
11阶fir数字滤波器的verilog程序设计,线性相位,系数量化处理(11 order of fir digital filter verilog programming, linear phase, the coefficient quantization)
- 2012-03-05 10:33:03下载
- 积分:1
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verilog 语言实例,对于新手学习有很大帮助的实例
verilog 语言实例,对于新手学习有很大帮助的实例-Examples of Verilog language, the novice has to learn very helpful examples of
- 2022-07-13 04:50:37下载
- 积分:1
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PID_Verilog
说明: 之前一直找不到自学编写了一个,PID案例,分享下(I have been unable to find a self-taught, compiled a PID case, share under)
- 2020-10-08 13:26:54下载
- 积分:1