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static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题(STA部分)(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分:1
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vga
利用FPGA控制VGA显示器显示字符汉字的程序,里面有注释。(VGA display with FPGA control procedures Kanji characters, there are comments.)
- 2013-11-25 11:59:13下载
- 积分:1
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DAC5578_I2C
TI公司的DAC5578驱动程序,经测试过的,CSDN资源分享(DAC5578 Driver of TI Company Tested and CSDN Resource Sharing)
- 2020-06-18 21:40:01下载
- 积分:1
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CNT4
说明: 4位二进制加法计数器的两种不同VHDL的描述,与比较。(4-bit binary addition of two different counter VHDL description, and more.)
- 2010-04-13 22:20:44下载
- 积分:1
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基于fpga的vga输出灰阶测试图片
使用软件:quartus 2 13.0基于DE2_115实验板vga输出灰阶测试图片
- 2022-09-25 04:25:03下载
- 积分:1
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EDAcodelock
能够在EDA环境下实现四位十进制数字密码锁的设置与开锁功能,并能更改使用密码,还可以防止抖动(EDA environment to achieve four decimal code lock and unlock function of the settings and change the use of passwords, but also to prevent the jitter)
- 2009-05-07 09:44:30下载
- 积分:1
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code
PLL中的TDC和DCO代码,是TI公司团队的,相当经典的代码,非常不错(the code of TDC and DCO)
- 2020-12-10 10:29:19下载
- 积分:1
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eetop.cn_16bits_multiplier
16位并行乘法器源代码,booth2编码,二进制树拓扑结构(16bits parallel multiplier source code
)
- 2020-12-24 20:59:05下载
- 积分:1
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homework32
说明: 这是32位移位寄存器,是用verilog编写的,能够实现从1到31位的左或右的移位(This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right)
- 2009-07-27 15:54:00下载
- 积分:1
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PS2_verilog基于ps2的接口,对于刚接触FPGA是个很好的选择
PS2_verilog基于ps2的接口,对于刚接触FPGA是个很好的选择,PS2_verilog基于ps2的接口,对于刚接触FPGA是个很好的选择
- 2022-02-20 06:07:15下载
- 积分:1