-
FPGAmotor
FPGA在直流电机调速中的应用,利用fpga进行PID闭环控制(tell us speed control for DC motor by FPGA,use fpga for PID circle control)
- 2010-11-03 20:40:42下载
- 积分：1
-
VHDL实现led灯的动态扫描，主要对CLK进行分频
VHDL实现led灯的动态扫描，主要对CLK进行分频-VHDL realization led lamp dynamic scan, the main points of the CLK to the frequency
- 2023-03-21 08:35:04下载
- 积分：1
-
Verilog languages with four arithmetic logic unit ALU, functional reference to 7...
用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
- 2023-07-06 11:15:03下载
- 积分：1
-
BaseLine1
this is an peak detection alguritm,in this matlab code u can clean base line noise to have clear ECG signal
- 2012-12-12 00:58:21下载
- 积分：1
-
这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着...
这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着-This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was
- 2022-05-13 15:53:30下载
- 积分：1
-
FPGA_homewrk4
设计一个能求出一个32bit字中两个相邻0之间最大间隙的电路。完成HDL设计及testbench描述，给出综合后的时序仿真结果。提交纸质文档。(Design a circuit that can find the maximum gap between two adjacent 0 in a 32bit word. The HDL design and testbench description are completed, and the result of comprehensive simulation is given. Submit paper documents.)
- 2018-05-07 17:54:12下载
- 积分：1
-
UART
说明： 串口通信vivado实现，带有仿真文件，可实现数据收发(the uart program based on vivado)
- 2020-07-02 16:15:57下载
- 积分：1
-
01_test
说明： FPGA测试程序，仅供测试硬件是否能够运行，主要功能是点亮运行指示灯(The main function of the test program of FPGA is to light the running indicator.)
- 2019-06-20 03:21:28下载
- 积分：1
-
Baseband_line_code
基于VHDL语言的基带线路码产生电路设计（毕业论文），内涵完整的源代码(Based on VHDL language baseband line code generation circuit design (Thesis), meaning the complete source code)
- 2010-07-03 22:38:09下载
- 积分：1
-
浮点数运算的FPGA实现，包括仿真文件。
浮点数运算的FPGA实现，包括仿真文件。-FPGA realization of floating-point operations, including the simulation file
- 2022-07-18 19:56:21下载
- 积分：1
