-
dds
说明: da的代码,在VHDL的编译环境下的开发。是一种集约的形式。(DA convert)
- 2009-08-21 11:32:04下载
- 积分:1
-
fulladd
this files in Quartus2 are fulladder
- 2016-05-17 16:38:42下载
- 积分:1
-
AGC
使用FPGA完成AGC 自动增益的代码,适合初学者(FPGA to complete the use of AGC automatic gain code, suitable for beginners)
- 2020-12-28 16:09:01下载
- 积分:1
-
本文件是用CPLD(EPM7064)驱动线阵CCD(ILX509),其中包括原理图和程序...
本文件是用CPLD(EPM7064)驱动线阵CCD(ILX509),其中包括原理图和程序-This document is a CPLD (EPM7064) driver line array CCD (ILX509), including schematics and procedures
- 2022-02-12 02:58:13下载
- 积分:1
-
lcd1602
艾米电子的液晶1602的Verilog语言程序
(Amy e-LCD 1602 of the Verilog language program)
- 2010-10-26 11:20:49下载
- 积分:1
-
atom.2007.12.tar
Cores are generated from Confluence a modern logic design language. Confluence is a simple, yet highly expressive language that compiles into Verilog, VHDL, and C
- 2008-05-12 10:13:23下载
- 积分:1
-
完成十余卷积过程,简单方便,能够这样那样这样,sorry
完成十余卷积过程,简单方便,能够这样那样这样,sorry-Convolution process more than a decade to complete, simple and convenient, this can be done this way, sorry
- 2022-10-31 06:20:03下载
- 积分:1
-
wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1
-
AD
说明: FPGA实现的AD采样控制程序的源码,欢迎大家下载(FPGA implementation of the AD sampling control)
- 2021-04-14 21:18:55下载
- 积分:1
-
math_real
in this code very useful for designing real number concept
- 2013-11-19 19:54:40下载
- 积分:1