-
代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心...
代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心-VHDL code based on the cultural code useful but may be under the wrong heart is dumping
- 2022-04-13 03:11:13下载
- 积分:1
-
chengxu_jieshou
nrf24l01发送代码,verilog实现NRF24L01通信(NRF24L01 send code, Verilog to achieve NRF24L01 communication)
- 2017-08-09 19:04:16下载
- 积分:1
-
85375524AGC
Matlab agc ʵ
- 2010-04-22 21:54:28下载
- 积分:1
-
e2
Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency
- 2014-02-23 02:42:47下载
- 积分:1
-
项目: 电梯控制器
你的任务是为一个单一的"传统"的先进的电梯控制器的设计
电梯(即,简单的向上/向下按钮呼叫电梯) 在四楼经营
建设。所述的基本单电梯设计规范
以下各节。
扩展您的两部电梯的设计是可选的将会奖励你额外的奖金。
- 2022-11-23 16:55:03下载
- 积分:1
-
Input_filter
Module for filtering input digital signal
- 2015-03-05 16:53:07下载
- 积分:1
-
quartus-and-modelsim-for-OFDM
说明: 关于quartus与modelsim 仿真(about quartus and modelsim simulator)
- 2011-04-03 18:29:56下载
- 积分:1
-
XadcMicroblaze-master
用zynq实现片内的数模转换,基于最新的zynq平台(zynq xadc on FPGA arm)
- 2020-06-21 12:00:02下载
- 积分:1
-
stm32-and-fpga-communication-by-spi
该实验完成的功能是STM32与FPGA通信(The function of the experiment is STM32 and FPGA communication)
- 2020-11-16 09:29:42下载
- 积分:1
-
使用vriloge硬件描述语言设计数字频率计,其对于高频测量精确,可测范围0―99999999HZ,在MAX+PLUSII中运行通过并在实验箱上运行通过达到要求...
使用vriloge硬件描述语言设计数字频率计,其对于高频测量精确,可测范围0―99999999HZ,在MAX+PLUSII中运行通过并在实验箱上运行通过达到要求-The use of hardware description language design vriloge digital frequency meter, and its high-frequency measurement for accurate, range 0-99999999HZ, in MAX+ PLUSII run me through and run the experiment to meet the requirement through
- 2022-01-25 18:01:01下载
- 积分:1