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本文创造性的提出了Q格式运算的一种新方法
本文创造性的提出了Q格式运算的一种新方法-Q This creative format proposed a new method for computing
- 2022-01-30 21:38:02下载
- 积分：1
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DUT7000的地址规划,dui PLC编程时使用,
DUT7000的地址规划,dui PLC编程时使用,-DUT7000 address planning, dui use of PLC programming,
- 2023-08-08 15:45:03下载
- 积分：1
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编程实现以下磁盘
编程序实现下述磁盘调度算法,并求出每种算法的平均寻道长度，要求设计主界面以灵活选择某算法，且以下算法都要实现：
1、先来先服务算法（FCFS）
2、最短寻道时间优先算法（SSTF）
3、扫描算法（SCAN）
4、循环扫描算法（CSCAN）
-programmed to achieve the following disk-scheduling algorithms, and each algorithm calculated the average Seeking length, main interface designed in a flexible choice of a particular algorithm and the algorithm must achieve the following : 1. first-come first-service algorithm (FCFS queue) 2, the shortest tracking time priority algorithm (SSTF), 3 scanning algorithm (SCAN) 4, cycle scanning algorithm (rltrasonic)
- 2023-02-03 09:50:04下载
- 积分：1
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三层结构及组件技术实现员工数据管理系统.pdf
三层结构及组件技术实现员工数据管理系统.pdf-three-tier structure and components technology employee data management system. Pdf
- 2022-07-23 18:37:20下载
- 积分：1
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2009 National Undergraduate Electronic Design Contest E question
2009年全国大学生电子设计大赛E题--电能收集充电器-2009 National Undergraduate Electronic Design Contest E question- Energy Chargers collection
- 2022-01-26 00:12:15下载
- 积分：1
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LCD320X240的控制器RA8803的资料
LCD320X240的控制器RA8803的资料-LCD320X240 data controller RA8803
- 2022-02-01 02:42:46下载
- 积分：1
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Digital phase
数字锁相环数学模型,对有研究信号调制的数学建模.-Digital phase-locked loop mathematical model of research has the mathematical modeling of signal modulation.
- 2022-10-18 04:25:03下载
- 积分：1
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数据仓库建设参考
数据仓库建设参考-reference data warehouse construction
- 2022-02-05 11:18:09下载
- 积分：1
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毕业设计论文，基于VC的Modbus通讯实现，用的是第三方通信类，实现了以个主机的通信界面，代码另附...
毕业设计论文，基于VC的Modbus通讯实现，用的是第三方通信类，实现了以个主机的通信界面，代码另附-Graduation thesis, based on VC Modbus communication to achieve, using third-party communications, implemented with a host of communication interfaces, the code attached
- 2022-02-21 04:56:13下载
- 积分：1
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This article: FPGA method used to simulate the high dynamic (Global Position Sys...
本文：采用了FPGA方法来模拟高动态(Global Position System GPS)信号源中的C／A码产生器。C／A码在GPS中实现分址、卫星信号粗捕和精码(P码)引导捕获起着重要的作用，通过硬件描述语言VERILOG在ISE中实现电路生成，采用MODELSIM、SYNPLIFY工具分别进行仿真和综合。-This article: FPGA method used to simulate the high dynamic (Global Position System GPS) signal source of the C/A code generator. C/A code in GPS to achieve sub-sites, the satellite signal capture coarse and fine code (P code) lead capture plays an important role, through hardware description language Verilog in ISE to achieve circuit to generate, using MODELSIM, SYNPLIFY simulation tools were and integrated.
- 2022-02-05 10:44:00下载
- 积分：1
