-
1. For the key input, please join the voice output circuit, representing the key...
1对于按键输入，请加入语音输出电路，代表按键sw1反馈的音频信息。每次按下sw1按钮时，它们都会发出0.1秒1KHz的声音。
- 2022-03-02 14:32:00下载
- 积分：1
-
24x24-booth
可用的24位x24位的booth乘法器的verilog代码(24X24 booth muplily)
- 2011-06-09 17:59:26下载
- 积分：1
-
lab12_design_files
des code source vhdl sur fpga
- 2016-03-29 08:09:05下载
- 积分：1
-
dianyuan
saber的仿真模型，是一个电源的，经过调试已经成功(The simulation model of the saber, is a power, after commissioning has been successfully)
- 2012-04-06 12:17:23下载
- 积分：1
-
uart
说明： 串口通信通用模块，FPGA Verilog语言 ise，vivado环境(uart,FPGA Verilog, ise,vivado)
- 2020-06-22 07:20:01下载
- 积分：1
-
SVPWM_FPGA_ContainSourceCode
广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》，在详细分析经典SVPWM算法基础上，提出一种优化算法，并在FPGA上实现。论文附录包含VHDL源码。(Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is proposed based on an optimization algorithm, and implemented on FPGA. Paper appendix contains VHDL source code.)
- 2013-12-30 16:00:11下载
- 积分：1
-
_145981_lUzelPjqIfKo
PWM调制流水灯的亮度，可以看到流水灯从亮到暗(PWM modulation)
- 2011-11-23 14:19:15下载
- 积分：1
-
PWM
通过一个计数器来实现输出信号的占空比要求，可以将duty_cycle分配到拨码开关上,LED分配到发光二极管上,然后调节拨码开关,即可看到LED的亮度发生变化.(The duty cycle of the output signal can be assigned to the dial switch by a counter, and the LED can be assigned to the light emitting diode. Then the brightness of the LED can be seen by adjusting the dial switch.)
- 2020-06-16 13:20:02下载
- 积分：1
-
Verilog_code_for_AWGN
说明： verilog实现awgn信道噪声的代码，支持可变的信噪比。利用移位寄存器来实现伪随机序列。(verilog code for implementation of awgn channel noise. support variable snr. use LSFR to implement the pseudo random sequence. )
- 2021-01-14 16:48:47下载
- 积分：1
-
VHDL产生时钟50分频程序，供初学者参考
VHDL产生时钟50分频程序，供初学者参考-VHDL generated clock frequency of 50 procedures, the reference for beginners
- 2022-03-06 08:34:20下载
- 积分：1
