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FPGA-LCD
关于FPGA针对LCD资源配置,及相关电路层次关系(LCD FPGA)
- 2012-09-18 22:47:41下载
- 积分:1
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EP2C70F896C6N-pins
将VHDL程序下载到DE2开发板,引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)
- 2020-12-09 11:09:21下载
- 积分:1
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adder
This the adder VHDL code, it contains input and output fild, also simulate file-adder
- 2022-06-21 18:48:32下载
- 积分:1
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ser_par
24bitAD数据采样进行串并转换,并行输出。另包括24位DA并串转换,串行输出。(24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.)
- 2009-12-10 15:46:54下载
- 积分:1
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这是一个verilog代码为根升余弦滤波器
this is a verilog code for root raised cosine filter
- 2022-05-25 01:29:30下载
- 积分:1
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Xilinx 的DDR SDRAM控制器,用Verilog HDL描述
Xilinx 的DDR SDRAM控制器,用Verilog HDL描述-
A DDR SDRAM contraller sample descripte in Verilog HDL ,base on Xilinx FPGA
- 2022-08-12 17:31:12下载
- 积分:1
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VGA_DE2_6V
VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)
- 2014-01-07 15:52:09下载
- 积分:1
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emif_tt
实现dsp与fpga的emif的verilog异步实现,可实现异步读写以及相应功能模块控制,文件中包含仿真后的波形图形以及仿真测试程序,运行环境quartus ii11.0,仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)
- 2020-12-04 15:59:23下载
- 积分:1
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verilog full case and paralel case directive usage
verilog full case and paralel case directive usage
- 2022-05-28 07:00:24下载
- 积分:1
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Miller-detector
Decoder using Miller method for UHF reader
- 2013-01-25 10:20:57下载
- 积分:1