-
flashZ
FPGA控制m25p16flash芯片读写控制spi协议
可实现擦除写入读出功能(SPI protocol for read and write control of m25p16 flash chip controlled by FPGA
Erase Write-Read Function)
- 2018-12-19 16:10:59下载
- 积分:1
-
suoxianghuan
常用的锁相环技术,此程序是我在设计高频电路中运用的,具体见程序,经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
- 2008-08-19 12:02:31下载
- 积分:1
-
delta-sigma
实现了MASH111功能,输入位数可编程(MASH 1-1-1, delta-sigma , input bits are programmable)
- 2021-04-20 23:18:50下载
- 积分:1
-
Quartus_II部分实例
说明: 38译码器,D触发器,全加器,计数器,抢答器,优先编码器,111序列检测器,并行输入转串行输出(poor English.
38 decoder, D trigger, full adder, counter, scrambler, priority encoder, 111 sequence detector, parallel input to serial output)
- 2020-05-18 12:06:54下载
- 积分:1
-
FPGA
verilog编写的QPSK发射机的FPGA部分,已经过验证,完全达到要求。调制矢量误差4%(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )
- 2013-10-08 14:58:23下载
- 积分:1
-
伺服电机主控制系统简单模拟实现
伺服电机主控制模块输入输出特性的简单模拟实现,输入目标电压及反馈的当前电压,输出对电机的控制脉冲波形(The simple simulation of the input and output characteristics of servo motor main control module, the input is target voltage and feedback is the current voltage, the output is the motor control pulse waveform)
- 2017-07-25 11:16:26下载
- 积分:1
-
QAM发生仿真
在Qaurtus环境下用Verilog输入实现64QAM信号的发生,用MATLAB协助验证,观察了PN序列对应的星座图。(Simulating generation of 64QAM RF Signal in Quartus II IDE,identified with MATLAB,constellation gram displayed.)
- 2021-03-02 23:39:33下载
- 积分:1
-
fifo
一个FIFO产生程序,主要是一个格雷码的加法器(A FIFO generation process, is primarily a gray code adder)
- 2011-08-28 10:39:31下载
- 积分:1
-
cppOrbitTools
tle转换为六根数的c++源代码,英文原版代码,测试可用(tle converted to six the number of c++ source code, the English original code, test available)
- 2021-03-16 10:49:21下载
- 积分:1
-
convolution_network_on_FPGA-master
在FPGA平台上运行的CNN模型,可以完成相关的功能(The CNN model that runs on the FPGA platform can complete the related functions)
- 2018-01-22 01:38:05下载
- 积分:1