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Using VHDL language description of the memory read and write, user
用vhdl语言描写的存储器的读写，通俗易懂，简单实用。-Using VHDL language description of the memory read and write, user-friendly, simple and practical.
- 2022-05-27 15:20:00下载
- 积分：1
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uart
使用FPGA实现UART收发。支持多种波特率。(Using FPGA to achieve UART transceiver.)
- 2020-11-07 15:29:50下载
- 积分：1
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vhdl 基于cpld的8*8点阵显示显示心型
基于CPLD的实现控制8x8点阵动态显示心型图案的程序，使用VHDL语言，通过调节分频系数可以实现点阵的变换速度，通过改变不同的状态可以让点阵显示不同的图案。
- 2023-07-21 07:55:03下载
- 积分：1
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PCIe_Lab(ALTERA-V5PCIe)
这一设计实例深入浅出，介绍怎样产生一个Qsys子系统。 您将产生一个含有以下组成的Qsys系统:在Cyclone IV GX收发器入门套件上,设计带嵌入式收发器的Gen1×1硬核IP的 PCI Express IP编译器。
(Qsys system: the Cyclone IV GX Transceiver Starter Kit, designed with embedded transceivers Gen1 × 1 hard IP PCI Express IP compiler.)
- 2020-12-02 18:39:25下载
- 积分：1
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qpsk_demod_use_FPGA
根据软件无线电的思想，提出了一种新颖的数字信号处理算法，对QPSK信号的相位进行数字化处理，从而实现对QPSK信号的解调.该算法允许收发两端载波存在频差，用数字锁相实现收发端载波的同步，在频偏较大的情况下，估算频偏的大小，自适应设置环路的带宽，实现较短的捕获时间和较好的信噪性能。整个设计基于XILINX公司的ISE开发平台，并用Virtex-II系列FPGA实现。用FPGA实现调制解调器具有体积小、功耗低、集成度高、可软件升级、扰干扰能力强的特点，符合未来通信技术发展的方向。(According to the idea of software radio, a novel digital signal processing algorithm, the phase of QPSK digital signal processing, enabling the demodulation of QPSK signals. This algorithm allows the sending and receiving ends of the carrier frequency difference exists, using digital phase-locked to achieve synchronization of sending and receiving end of the carrier, in the case of large frequency offset, frequency offset estimation of the size, adaptive set the loop bandwidth to achieve shorter acquisition time and better noise performance. The whole design is based on the company XILINX ISE development platform, and Virtex-II series with the FPGA. FPGA realization of a modem with a small size, low power consumption, high integration, software upgrades available, the characteristics of strong interference interference, in line with the future direction of ICT development.)
- 2010-12-06 10:52:36下载
- 积分：1
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control
该程序描述了运用FPGA进行控制的S形曲线和其他传统加减速控制曲线方法的控制曲线比较研究。(This program is compiled in matlab circumstance。Describing the approach of S-curve control method in FPGA in machine controlling.)
- 2011-12-08 10:22:11下载
- 积分：1
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FIFO的Verilog程序 已在modelsim中编译通过 并且可以通过DC进行综合...
FIFO的Verilog程序 已在modelsim中编译通过 并且可以通过DC进行综合-FIFO procedures have been in the Verilog in ModelSim compiler and can be passed through the integrated DC
- 2022-03-13 00:38:40下载
- 积分：1
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Verilog digital system design tutorials, e
Verilog数字系统设计教程，作者夏宇闻电子书籍-Verilog digital system design tutorials, e-books by XIA Yu-Wen
- 2023-03-21 06:15:07下载
- 积分：1
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用VHDL语言实现的ARM处理器的标准内核的源代码程序，可在重用...
用VHDL语言实现的ARM处理器的标准内核的源代码程序，可在重用-use of the VHDL standard ARM processor core source code procedures, the reuse
- 2023-06-17 04:15:04下载
- 积分：1
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BPSK
说明： 先用Matlab理论仿真，再用Verilog语言在ISE环境下编写程序，可通过手机发送指令来控制上下变频器的参数。(Firstly, we use the theory of MATLAB to simulate, and then use Verilog language to write programs in ISE environment. The parameters of up-down converter can be controlled by sending instructions from mobile phone.)
- 2020-06-19 22:40:02下载
- 积分：1
