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AES128
AES128 encription vhdl code
- 2014-03-05 00:48:13下载
- 积分：1
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线性反馈移位寄存器的随机数发生器
线性反馈移位寄存器的最右侧位称为输出位。水龙头是 XOR 按顺序和输出位，然后反馈到最左边的位。在最右边的位置的位序列的叫做输出流。双边投资条约中的线性反馈移位寄存器状态影响输入被称为水龙头 （在图中的白色）
- 2022-02-13 22:21:05下载
- 积分：1
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sdcard_mass_storage_controller
A host controlled ot control sd cards
- 2021-04-29 13:58:43下载
- 积分：1
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unishift
An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.
- 2009-09-24 18:56:48下载
- 积分：1
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PC
说明： Verilog HDL语言编写的32位程序计数器（PC）完整工程及相应仿真，QuartusII7.2下编译通过可正常使用。(Complete engineering and simulation of Verilog HDL language of the 32-bit program counter (PC), QuartusII7.2 compiled through normal use.)
- 2012-09-06 09:07:47下载
- 积分：1
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Decoder_CC_P
Convolotional Decoding Based on Viterbi Algorithm
- 2021-05-13 16:30:02下载
- 积分：1
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CC
说明： quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)
- 2008-04-09 14:41:36下载
- 积分：1
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Ffpga-jpegP
基于FPGA的JPEG图像压压缩，实现JPEG图像的实时压缩
(Real-time compression pressure compressed FPGA-based JPEG images, JPEG images)
- 2012-08-23 22:11:39下载
- 积分：1
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build synthesizer on a de2 dev fpga board
build synthesizer on a de2 dev fpga board
- 2023-07-24 00:25:04下载
- 积分：1
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AD
说明： 基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)
- 2020-12-19 17:09:10下载
- 积分：1
