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vga example for altera
altera的vga示例
- 2022-08-03 13:31:56下载
- 积分：1
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FPGA
基于FPGA与LM4550B的AC97软声卡VHDL语言驱动，版本2.0-FPGA-based soft and LM4550B the AC97 sound card driver VHDL language, version 2.0
- 2022-10-28 20:25:03下载
- 积分：1
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VHDL项目设置：FLV
vhdl项目设置：
flv的
-VHDL Project Settings: flv
- 2022-07-18 14:46:43下载
- 积分：1
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oled
驱动0.96寸的oled显示数字和字母，(Drive 0.96 inch OLED to display numbers and letters.)
- 2021-01-14 16:28:46下载
- 积分：1
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m_xulie
在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)
- 2013-09-26 11:30:47下载
- 积分：1
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delay
PWM整流器的死区延迟的VHDL编程，可以参考一下(VHDL programming PWM Rectifier dead-band delays)
- 2016-04-12 14:24:45下载
- 积分：1
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lbs_fpga_upld
利用FPGA实现与powerpc的localbus数据接口代码。用verilog实现(localbus interface with PowerPC using Verilog)
- 2020-11-25 22:59:38下载
- 积分：1
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cpldfpga
《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
- 2009-04-20 20:59:16下载
- 积分：1
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Altera公司的DE2平台的VGA接口的应用程序，从上到下KEY0
ALTERA的DE2平台VGA接口应用，由KEY0－KEY3控制上下左右，使屏幕上光标移动，由Verilog描述。-ALTERA the DE2 platform VGA interface applications, from top to bottom KEY0-KEY3 about control, so that the screen cursor by the Verilog description.
- 2022-09-28 16:00:04下载
- 积分：1
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32bit_multiply
包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)
- 2015-01-18 21:20:48下载
- 积分：1
