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SR_DDS
DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)
- 2016-03-20 22:04:51下载
- 积分：1
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UART
UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)
- 2016-06-06 20:35:02下载
- 积分：1
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apbi2c_latest.tar
APB总线协议转I2C总线协议的接口IP，verilog代码实现，包含详细testbench(APB bus interface to I2C bus interface IP，verilog code )
- 2020-09-16 10:27:55下载
- 积分：1
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FPGAsheijidaquan
说明： fpga设计常用资料大全，包含常用的FPGA程序资料，对FPGA学习者有很大的帮助。(Encyclopedia of common information fpga design, FPGA that contains commonly used procedures for information on the FPGA is very useful to learners.)
- 2009-07-25 21:45:30下载
- 积分：1
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verilog
基于QUATEUS2的设计一个8位频率计verilog语言编程(The design is based QUATEUS2 an 8-bit frequency counter verilog programming language)
- 2011-12-01 20:19:48下载
- 积分：1
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Code
用于数字积分器的设计，主要涉及VHDL、Verilog等FPGA编程语言。(Design of Digital Integrator)
- 2011-11-23 21:31:03下载
- 积分：1
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classic-examples-of-Verilog
一些verilo的经典实例，非常适合初学者(verilo of the classic examples, for beginners)
- 2011-08-01 09:01:34下载
- 积分：1
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clz
说明： 对于一串二进制数前置零的计数的Verilog程序(For a string of binary zero count Verilog pre-procedure)
- 2021-03-31 21:29:08下载
- 积分：1
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FPGA
spwm dcac逆变 fpga与单片机一起作用(sdad)
- 2010-08-12 18:20:08下载
- 积分：1
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Single-port-RAM-
单口RAM带CLR信号的verilog程序。很详细的.(Single-port RAM with a CLR signal)
- 2011-08-07 11:27:59下载
- 积分：1
