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ssb
ssb的调制与解调,包括信号的产生、乘法器、加噪、BPF、解调等部分。(ssb modulation and demodulation, signal generation, multiplier, adding noise, BPF, demodulation section.)
- 2013-04-11 16:02:10下载
- 积分:1
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and VHDL source code
VHDL与源代码包-and VHDL source code
- 2022-07-21 05:42:10下载
- 积分:1
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uart
说明: 串口通信通用模块,FPGA Verilog语言 ise,vivado环境(uart,FPGA Verilog, ise,vivado)
- 2020-06-22 07:20:01下载
- 积分:1
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sp6ex5
说明: xilinx SP6系列的3-8译码器实现(Implementation of Xilinx SP6 Series 3-8 Decoder)
- 2020-06-22 21:40:01下载
- 积分:1
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ConvolutionWithViterbiDecoding
QPSK调制下的(5,7)卷积码的编码和维特比译码与BPSK调制下(5,7)卷积码的编码和维特比译码的BER特性(QPSK modulation under (5,7) convolutional code encoding and Viterbi decoding and BPSK modulation (5,7) convolutional code encoding and Viterbi BER characteristic)
- 2020-12-12 20:09:15下载
- 积分:1
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vhdl
说明: vhdl常见小实验代码,包括二进制比较器,4选1,8421十进制,8421转化成格雷码,8421余三码,分频器,数据码译码器,二进制减计数器,四位环形计数器等(VHDL common small experiment code)
- 2020-06-24 13:00:02下载
- 积分:1
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HARQ
HARQ技术研究,以喷泉码为研究对象,结合LDPC纠错码而研究的。(HARQ technology research to fountain codes for the study, and research combined with LDPC error correction code.)
- 2015-05-21 16:54:15下载
- 积分:1
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This is an FPGA
这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
- 2022-02-02 20:49:24下载
- 积分:1
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z80_latest.tar
Vhdl design z80 for altera users
- 2013-04-24 14:47:01下载
- 积分:1
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VHDL-Keyboard
设计制作一个检测4*4矩阵键盘的按键编码的实验,把实际按键的键值的八位编码先转换成从0000—1111的编码,再译成数码管能识别的八位编码,在数码管动态显示时,4*4矩阵键盘的第一行对应00—03,第二行对应04—07,第三行08—11,第四行对应12—15。(Design a 4* 4 matrix keyboard key coding experiments to detect the key the actual key octet coded first convert from 0000-1111 encoding, and then translated into digital tube to identify the eight coding, digital tube dynamic display, the first line of the 4* 4 matrix keyboard corresponding to 00-03, the second line corresponds to 04-07, the third line of 08-11, the fourth line corresponds to 12-15.)
- 2012-07-01 10:02:33下载
- 积分:1