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synthesis-bandstop-filters
本例介绍直接合成带阻滤波器的方法,n阶滤波器能实现n个传输零点(A direct synthesis technique of a new class of bandstop
coupled resonator elliptic filters is presented. Two different
coupling schemes, which both include source–load coupling are
used. The first coupling and routing scheme is the standard folded
structure used in implementing bandpass elliptic filters with
transmission zeros using resonators.)
- 2013-03-12 18:19:01下载
- 积分:1
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multiply
由verilog编写的乘法器,通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分:1
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1024-point-FFT-in-verilog.pdf
1024 点得快速傅里叶变换算法 FPGA in verilog(1024 point FFT on a FPGA written in verilog)
- 2014-03-26 22:56:23下载
- 积分:1
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128点FFT/IFFT变换
快速傅立叶变换(FFT)作为时域和频域转换的基本运算,是数字谱分析的必要前提。传统的FFT使用软件或DSP实现,高速处理时实时性较难满足。FPGA是直接由硬件实现的,其内部结构规则简单,通常可以容纳很多相同的运算单元,因此FPGA在作指定运算时,速度会远远高于通用的DSP芯片。FFT运算结构相对比较简单和固定,适于用FPGA进行硬件实现,并且能兼顾速度及灵活性。本文介绍了一种通用的可以在FPGA上实现128点FFT变换的方法。设计复数乘法器为核心设计了FFT算法中的基-2蝶形运算单元,溢出控制单元和地址与逻辑控制模块等其它模块,并以这些模块和FPGA内部的双口RAM为基础组成了基-2FFT算法模块。
- 2022-02-15 18:50:58下载
- 积分:1
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HDB3
HDB3 encoder and decoder(HDB3 decoer)
- 2020-11-11 12:29:45下载
- 积分:1
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RS-code
说明: 我测试过的!Verilog HDL实现RS编码。(I' ve tested it! RS coding Verilog HDL implementation.)
- 2010-04-12 20:30:36下载
- 积分:1
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FFT程序,此程序虽然耗逻辑资源很大,但是在接受数据后的第7个时钟沿就可以输出FFT变换后的数据,对要求时延较低的系统可以考虑...
FFT程序,此程序虽然耗逻辑资源很大,但是在接受数据后的第7个时钟沿就可以输出FFT变换后的数据,对要求时延较低的系统可以考虑-FFT procedure, this procedure should not consume a lot of logic resources, but the data in the first seven clock can be output along the FFT transformed data, the requirements of time-delay system can be considered lower
- 2022-05-13 18:56:56下载
- 积分:1
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54948739-Digital-Signal-Processing-With-Field-Pro
I am in need of some codes of HDL
- 2014-02-10 22:18:48下载
- 积分:1
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codeloc1k
说明: 实现电子密码锁的各项功能,经过编译和仿真(Electronic code lock of the function, the compiler and simulation)
- 2008-11-09 21:24:14下载
- 积分:1
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FPGA
韩福柱老师FPGA实验源码,用vhdl语言在xilinx FPGA上实现,包括ad采集,温度传感器读取,秒表,跑马灯和按键次数统计4个实验(Han Fu teacher FPGA column experiment source code, vhdl languages on xilinx FPGA implementations, including ad acquisition, temperature sensor readings, stopwatch, marquees and keystrokes 4 experimental statistics)
- 2017-01-06 15:54:53下载
- 积分:1