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Verilog写的 8 位超前进位加法器
Verilog写的 8 位超前进位加法器-Verilog write 8-bit CLA
- 2023-01-24 03:30:03下载
- 积分：1
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TRY-1516-CSV0115--- SANGEETHA
VHDL BASED DATA COMPRESSION
- 2019-01-01 16:37:53下载
- 积分：1
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UART的源（格版）
UART 源码 (lattice version)-UART source (lattice version)
- 2022-10-19 10:25:04下载
- 积分：1
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A VHDL source code for testing the digits and the switches on a spartan 3 basys...
A VHDL source code for testing the digits and the switches on a spartan 3 basys board
- 2023-06-18 08:35:04下载
- 积分：1
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VHDL design entities, the basic structure of the language element of VHDL using...
VHDL设计实体的基本结构
VHDL的语言要素
用VHDL实现电路设计的方法
VHDL设计流程-VHDL design entities, the basic structure of the language element of VHDL using VHDL circuit design approach to achieve VHDL design flow
- 2022-08-10 09:13:22下载
- 积分：1
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mmuart
说明： 简单uart，verilog语言编写，已经经过测试，有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)
- 2020-06-23 20:00:01下载
- 积分：1
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Cerradura
Conduct a digital system ( electronic lock ) using
hierarchic methodology .
An electronic lock is a device that allows access or
opening of a system , as long as the key or combination to enter match
with which it is predefined in said lock .
- 2014-10-10 15:41:14下载
- 积分：1
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DATA_Scramble
扰码器的FPGA实现，选择的扰码器规格为15位移位寄存器。(FPGA scrambler, scrambler specifications for a 15 bit shift register.)
- 2021-01-16 19:28:46下载
- 积分：1
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IMPLEMENTATION OF LCD DISPLAY BOARD
本程序给出了在FPGA板上实现LCD显示的方法。支持的FPGA有APARTAN 3、SPARTAN 3E、VIRTEX 3等
- 2023-07-19 05:25:03下载
- 积分：1
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AD9117芯片配置程序
说明： 实现AD9117芯片的配置功能，这是一款DAC芯片(Realize the configuration function of ad9117 chip, which is a DAC chip)
- 2020-07-07 16:58:58下载
- 积分：1
