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hard work for Dictyophora development. . We hope that the right useful.
辛辛苦苦的作品应用于DE2 的 开发。。希望对大家有用。-hard work for Dictyophora development. . We hope that the right useful.
- 2022-05-25 11:15:19下载
- 积分：1
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m73a_nand_model
说明： Micron公司m73a系列nand flash仿真模型及测试文件(micron m73a series nand flash simulation model and testbench)
- 2011-03-25 22:17:32下载
- 积分：1
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dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
- 2022-11-12 18:25:03下载
- 积分：1
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vibration-test-for-shafting-system
轴系测试程序，多通道输入输出，实现时域、频域、轴心轨迹、瀑布图等功能。(Shafting test program, multi-channel input and output, to achieve time domain, frequency domain, orbit, waterfall and other functions.)
- 2013-06-28 16:20:50下载
- 积分：1
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ag-overview
说明： agilex fpga description
- 2019-05-13 18:21:04下载
- 积分：1
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verilog-lfsr-master
说明： Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.
- 2020-06-24 21:40:01下载
- 积分：1
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switch--circuit
最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)
- 2013-11-25 15:56:17下载
- 积分：1
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S6_VGA
1。源文件保存在src目录，QII的工程文件保存在Proj目录；
2。程序实现的功能是在VGA显示器上显示彩色条纹，共8种颜色，
可以使用嵌入式逻辑分析仪观测信号；
3。modelsim仿真文件在proj--simulation--modelsim中(1. The source file is saved in the src directory QII project file is saved in the directory Proj 2. The functionality of the program is displayed on a VGA monitor color stripes, 8 colors, you can use the embedded logic analyzer observed signals 3. the modelsim simulation files in the proj- simulation- modelsim)
- 2012-11-04 18:26:48下载
- 积分：1
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dianzhen
如果需要用verilog设计一项比较简单的功能，那么这个浅显易懂的程序能让你很快明白点阵的设计方法，尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分：1
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rtl
基于脉动结构的有限域乘法器，verilog代码(Based on the pulse of the structure of finite field multipliers, verilog code)
- 2010-01-04 11:48:50下载
- 积分：1
