-
fpga_coder_module
本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.(FPGA optical encoder input module, there is no experimental, but simulation technology, hope to have reference value.)
- 2021-04-21 01:58:50下载
- 积分:1
-
sine_cordic
generate sine wave. Inputs : Amplitude, phasein, frequency
- 2013-07-22 10:25:41下载
- 积分:1
-
Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.
周立功Verilog HDL黄金参考指南,学习VerriLog的东西。-Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.
- 2022-04-28 19:53:04下载
- 积分:1
-
Muliplexer
说明: Multiplexer 4 to 1 on Modelsim
- 2020-10-14 13:56:09下载
- 积分:1
-
二进制神经网络(BNN)bnn-fpga-master
说明: bnn-fpga是FPGA上CIFAR-10的二进制神经网络(BNN)加速器的开源实现。 加速器针对低功耗嵌入式现场可编程SoC,并在Zedboard上进行了测试。 在编写CIFAR-10测试集中的10000张图像时,错误率是11.19%。(bnn-fpga is an open-source implementation of a binarized neural network (BNN) accelerator for CIFAR-10 on FPGA. The architecture and training of the BNN is proposed by Courbarieaux et al. and open-source Python code is available. Our accelerator targets low-power embedded field-programmable SoCs and was tested on a Zedboard. At time of writing the error rate on the 10000 images in the CIFAR-10 test set is 11.19%.)
- 2020-07-27 07:02:34下载
- 积分:1
-
spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1
-
build a tv box on fpga cyclone 2
build a tv box on fpga cyclone 2
- 2022-03-10 23:00:00下载
- 积分:1
-
模糊控制器verilog程序代码
说明: 模糊控制器verilog程序,模糊控制器最简单的实现方法是将一系列模糊控制规则离线转化为一个查询表(又称为控制表)。这种模糊控制其结构简单,使用方便,是最基本的一种形式。(Verilog program of fuzzy controller)
- 2020-04-14 12:04:52下载
- 积分:1
-
VHDL编写的4个led灯循环明暗变化,通过改变波形占空比实现,课堂作业自编程序...
VHDL编写的4个led灯循环明暗变化,通过改变波形占空比实现,课堂作业自编程序-VHDL prepared by the four led lights cycle shading changes, by changing the waveform duty cycle to achieve, self-compiled class operating procedures
- 2022-04-17 17:16:20下载
- 积分:1
-
一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。
一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。-One can use RocketI/O development example. Based on Xilinx FPGA Virtex5 platform.
- 2022-02-12 14:18:54下载
- 积分:1