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LEDTest2
This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing
- 2017-10-28 16:27:20下载
- 积分:1
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基于ep4ce22的verilog串口程序
基于ep4ce22的verilog串口程序,可发送24bit,希望能给大家提供帮助。
- 2022-05-30 03:01:25下载
- 积分:1
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project_1
说明: 简单的一个Verilog小程序,适合刚接触的人群(A simple Verilog small program, suitable for people just contact)
- 2020-06-16 22:20:01下载
- 积分:1
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简单的全加器语言代码
这是一个简单的 1 位全加器语言代码
" 时间刻度 1ns / 1ps
模块 1BitFullAdder (
输入,
输入的 b
输入的 cin
输出 s
输出 cout) ;
分配 s = a ^ b ^ cin ;
分配 cout = (& b) |(& cin) |(b 和 cin) ;
endmodule
//Test 工作台
" 时间刻度 1ns / 1ps
- 2022-02-03 18:26:33下载
- 积分:1
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capture-using-SCCB-and-FPGA
利用SCCB和FPGA实现视频采集的论文,对相关开发人员具有很强的参考价值!
(FPGA implementation using the SCCB and video collection of the papers, the relevant developer has a strong reference value !
)
- 2013-09-29 15:37:52下载
- 积分:1
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yuandaima
以GPS为时间基准,实现多传感器器数据同步采集,整合信息后发送 VERILOG语言编写 QUARTUS II环境(GPS-time basis, synchronized multi-sensor data acquisition, integration of information after sending VERILOG language environment QUARTUS II)
- 2014-10-12 19:15:45下载
- 积分:1
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uart-for-fpga
说明: Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分:1
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liyuanlnx_key_beep
说明: FPGA按键加蜂鸣器实验:
加延时防抖+蜂鸣器(Experiments of keys and buzzers in FPGA)
- 2020-06-22 04:00:01下载
- 积分:1
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VHDL——如何写简单的testbench
基于VHDL的testbench编写攻略(VHDL based on the preparation of testbench Raiders)
- 2017-07-31 15:00:45下载
- 积分:1
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gtx
说明: ip core of the transceiver gtx
- 2019-04-02 00:10:03下载
- 积分:1