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mul_ser12
本源码是用Verilog编写的12位移位相加乘法器的设计源码,开发软件为MAX+PLUS,已经测试通过。(The Verilog source code is written in the sum of 12-bit shift multiplier design source code, developing software for the MAX+ PLUS, has been tested.)
- 2011-05-31 14:19:30下载
- 积分:1
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FPGA做从设备的IIC逻辑
用逻辑实现iic协议,其中fpga端作为从设备,接收主设备发送过来的信号,并解析。由于是是作为从设备,因此,也不需要发送对端的IIC地址,对外就是SDA和SCL这2根信号线
- 2022-04-08 08:36:38下载
- 积分:1
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clock18div
Clock Divider, divfactor of 18
- 2015-03-24 18:04:49下载
- 积分:1
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CORDIC_ATAN
FPGA实现反正切功能,工程原件,包括测试文件,能够很好实现该功能(FPGA implements arctangent function, original engineering)
- 2018-11-06 15:25:26下载
- 积分:1
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zuheshixu
说明: 组合时序电路的小例子,移位和数据选择器的代码,以及测试文件(Small examples of combinational sequential circuits, code for shift and data selectors, and test file.)
- 2019-12-12 15:13:50下载
- 积分:1
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人脸识别(3D)
基于高清视频的3D人脸识别源代码,四万多行,经过FPGA实际验证,最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)
- 2019-07-01 16:22:46下载
- 积分:1
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FIR_filter
说明: 滤波器就是对特定的频率或者特定频率以外的频率进行消除的电路,被广泛用于通信系统和信号处理系统中。(Filter is a circuit that eliminates specific frequencies or frequencies other than specific frequencies. It is widely used in communication systems and signal processing systems.)
- 2020-06-21 14:00:01下载
- 积分:1
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xilinx-FPGA
xilinx FPGA技术详解,从设计流程到设计注意点(xilinx FPGA technology Detailed Design points, from the design process to)
- 2012-08-10 13:07:41下载
- 积分:1
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cordic_dds
采用CORDIC算法的直接数字频率合成器的设计(CORDIC algorithm uses direct digital frequency synthesizer design)
- 2015-08-18 16:15:17下载
- 积分:1
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DMA_controller
dma传输控制程序,Verilog编写,通过编译,完全可用
- 2022-09-18 05:20:03下载
- 积分:1