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32FIRVHDL
基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器，运行速度更快，占用内存更小，延迟更小。
(32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.)
- 2014-05-12 21:11:19下载
- 积分：1
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sobel_edge_detect
sobel边缘检测，用于图像处理。实现了该算法在FPGA上的实现代码。(Sobel edge detection for image processing.Implementation of the algorithm to achieve the FPGA code.)
- 2016-07-17 21:54:26下载
- 积分：1
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rs232_3
说明： 为串口收发器以及汉明编码，将电脑通过串口发送的7位数据转化成汉明码显示于led上，或把接收到的11位汉明码解码并验错纠错(For the serial port transceiver, and Hamming codes, the computer through the serial port into 7-bit data displayed on the led on the Hamming code, or to receive the 11 Hamming code error correction decoding and experience)
- 2010-04-29 22:18:02下载
- 积分：1
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Desktop
说明： qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)
- 2019-03-16 02:52:26下载
- 积分：1
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src
说明： 假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分：1
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JTAG
边界扫描技术相关资料，含各个模块的介绍。很有参考价值。(JTAG TAG CONTROLLER)
- 2016-02-24 19:10:03下载
- 积分：1
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Vivado基础实验
通过用vivado完成一个流水灯项目手把手教你如何使用vivado，内容十分详细。(Using vivado to complete a running light project, you can learn how to use vivado by hand. The content is very detailed.)
- 2018-12-06 16:14:45下载
- 积分：1
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AN65974
CYPRESS官方给的FPGA程序，用于调试USB3.0接口(Verilog source files for debugging USB3.0 interface)
- 2020-11-30 17:49:27下载
- 积分：1
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8aqm-string-and-convert-vhdl-program
8aqm调制串并转（1:3）换部分vhdl程序(8aqm string and convert vhdl program)
- 2011-01-20 18:31:26下载
- 积分：1
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al422b
AL422B,FPGA写的控制时序。XIWANGDUIDAJIAYOUYONG(AL422B,timing of AL422b.)
- 2014-04-17 21:41:09下载
- 积分：1
