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UART(RS232)
用VERILOG语言实现的通用异步串行收发器（RS232收发器），波特率可设置，通讯稳定，已成功应用于实际项目。(VERILOG language with universal asynchronous serial transceivers (RS232 transceiver), the baud rate can be set, communication stability, has been successfully applied in actual projects.)
- 2021-04-01 10:59:08下载
- 积分：1
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xj2
基于FPGA，利用VHDL语言对小车循迹进行设计。(Car tracking)
- 2011-11-01 22:36:25下载
- 积分：1
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8路彩灯变换
实现1:8路彩灯同时亮灭；2：8路彩灯从左到右逐次亮灭；3:8路彩灯间隔亮灭；4：高电平清零5：包含分频
- 2022-01-25 21:17:22下载
- 积分：1
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5408A
The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
720-channel source driver has true 6-bit resolution, which
(The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
)
- 2012-07-16 17:09:15下载
- 积分：1
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multiply_8_VHDL
由8 位加法器构成的以时序方式设计的8 位乘法器，采用逐项移位相加的方
法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件，运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
- 2014-04-11 16:58:04下载
- 积分：1
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FSK
2FSK的matlab仿真，叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)
- 2021-04-13 02:58:56下载
- 积分：1
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DA模块（TLC5620）、AD模块(TLV1544)
//顶层模块
//本次正弦波频率大约在750-800Hz，没有精确计算，和DA的加载时间有关
module DA_AD
(
clk,
rst_n,
DAC_SCLK,
DAC_DATA,
DAC_LDAC,
DAC_LOAD,
ADC_SDO,
ADC_SDI,
ADC_SCLK,
ADC_EOC,
ADC_CS,
ADC_FS,
led1
);
input clk;
input rst_n;
output DAC_SCLK;
output DAC_DATA;
output DAC_LDAC;
output DAC_LOAD;
//AD相关
input ADC_SDO; //ADC转换完成输出的数据
input ADC_EOC; //ADC的转换完成输出信号
output ADC_SDI; //ADC的输入数据
output ADC_SCLK; //ADC时钟信号
output ADC_CS; //ADC片选,低有效
output ADC_FS; //DSP模式帧起始信号
output led1;
wire DATA_EN;
wire [7:0] Cordic2driver;
wire start;
TLC5620_driver ins_TLC5620_driver
(
.clk(clk),
.rst_n(rst_n),
.DATA_IN(Cordic2driver),
.DATA_EN(DATA_EN),
.
- 2022-02-05 07:51:39下载
- 积分：1
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DDC_matlab
实现数字变下频的matlab程序，CIC,HB,FIR滤波器代码都在其中(Realize digital variable frequency under matlab, CIC, HB, FIR filter code in it
)
- 2021-01-09 11:28:53下载
- 积分：1
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systolic
脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器(Pulse Multiplier: a GF (2m) domain on the Digit-Serial pulsation structure (Systolic) the multiplier)
- 2020-11-13 10:39:43下载
- 积分：1
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EPM3064 FPGA控制8个通道开关控制
应用背景EPM3064 FPGA控制8个通道开关控制，实现音响信号输入切换和信号混合.简化控制电路，减少电路板空间。关键技术电路运行可靠安全，接模拟电路输入信号选择器CD444DJ可以控制8通道模拟数信号通断。
1、实现高速任意通道的开启和关闭
2、LED指示开启通道。
3、输出电路心跳指示，显示电路工作状态。
- 2022-12-26 05:50:03下载
- 积分：1
