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CAN总线通信
can总线通信参考资料,实现can总线通信传输
- 2022-08-25 10:10:50下载
- 积分:1
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turbo[1].tar
turbo码的verilog程序,有意者请下载。(turbo code verilog procedures Interested parties please download.)
- 2021-01-14 17:58:46下载
- 积分:1
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spi_hello
SPI接口测试程序,Xilinx参考设计,ML507硬件测试通过.(SPI interface test code,Xilinx reference design,tested on ML507 platform.)
- 2013-09-01 09:37:04下载
- 积分:1
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shift_reg
Shift reg in vhdl, a first example to start
- 2011-03-27 10:35:25下载
- 积分:1
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DE2_115_CAMERA
实现DE2_115开发板上配套的500万像素cmos摄像头捕捉到的画面显示在VGA上(DE2_115 development board supporting 5,000,000 pixels cmos camera to capture the screen display in VGA)
- 2020-07-09 19:08:55下载
- 积分:1
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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分:1
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fifo
异步FIFO
输入: 16bit
输出:16bit
深度:256(Asynchronous FIFO
Input: 16bit
Output: 16bit
Depth: 256)
- 2017-07-10 14:02:36下载
- 积分:1
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project_first
说明: basys3的数字钟,可以显示00.00-59.59(Digital clock of basys3,It can display 00.00-59.59)
- 2019-06-18 10:37:53下载
- 积分:1
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weifen-program
基于FPGA微分程序代码及其电路驱动程序(Based on FPGA differential program
)
- 2011-12-19 12:17:59下载
- 积分:1
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2018全国大学生FPGA大赛封闭测试上机题
说明: 2018全国大学生FPGA创新设计大赛南京总决赛封闭测试题目,以及自己编写的verilog和testbench,欢迎学习借鉴(The closed test topic of the 2018 National Undergraduate FPGA innovation design competition Nanjing finals, as well as Verilog and testbench compiled by ourselves, are welcome to learn)
- 2020-11-23 22:39:33下载
- 积分:1