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fifo
一个FIFO产生程序,主要是一个格雷码的加法器(A FIFO generation process, is primarily a gray code adder)
- 2011-08-28 10:39:31下载
- 积分:1
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使用fpga进行温控的程序
使用fpga基于积分分离的pid算法进行温控的程序,经实验证明很稳定-Fpga points based on the use of separate pid process temperature control algorithm, the experiment proved to be stable
- 2022-07-07 17:04:57下载
- 积分:1
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IC设计基础
说明: 一本很经典的IC设计中文入门书籍,由任艳颖,王彬编著,翻印几百万册(A very classic introduction to Chinese in IC design book, compiled by Ren Yanying and Wang Bin, reprinted millions of copies)
- 2020-06-23 22:20:02下载
- 积分:1
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680605rece_7E
hdlc协议的相关程序,用verilog语言编写,供大家交流学习(hdlc protocol procedures using Verilog language for the exchange of learning)
- 2013-01-18 00:53:58下载
- 积分:1
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e_BIU
isa MEMORY PLAN eu biu asm
- 2020-06-25 19:20:02下载
- 积分:1
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zybo 音频播放
zybo audio 音频播放,可以实现在pc端播放音乐然后在zybo上放出来,通过改变寄存器也可以从麦克风上我们自己说话然后通过音频口放出来
- 2022-07-04 17:15:15下载
- 积分:1
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12864hanzixianshi
基于FPGA 的12864液晶显示汉字,用verilog编写的。(12864 liquid crystal display Chinese characters based on FPGA, written in verilog.)
- 2021-04-27 15:48:44下载
- 积分:1
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clk_div3
在fpga中对于pll无法完成的分频,可采用计数方式,本例用状态机实现对时钟的奇数分频。(Pll in fpga can not be completed in the sub-frequency counting method can be used, in this case with the state machine to achieve an odd number on the clock frequency.)
- 2010-07-28 20:03:41下载
- 积分:1
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vending-machine
用Verilog实现自动售货机功能,代码较初级。易懂,内含test文件。(Automatic vending machines function with Verilog code than the primary. Understandable, containing test files.)
- 2013-11-30 20:25:34下载
- 积分:1
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ethernet_loopback
通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the network to send data packets to FPGA, FPGA will receive the data back to the PC, the proposed test before adding ARP static binding, FGPA internal IP and MAC address in the COE document in the ROM where you can see, the sender adds CRC and CHECKSUM integral calculation)
- 2017-11-20 10:21:38下载
- 积分:1