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the-verilog-code-of-can-usb-i2c
CAN总线，I2C，USB等的FPGA实现源码(CAN bus, I2C, USB, etc. FPGA implementation source)
- 2012-12-15 01:25:33下载
- 积分：1
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QMD
说明： 实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)
- 2019-05-05 15:37:58下载
- 积分：1
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ADS8509
FPGA驱动高输入电压范围的ADS8509芯片，采样范围广，适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)
- 2015-08-10 22:03:59下载
- 积分：1
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FPGA realization of DDS with the schematic diagram, structural clarity, the use...
用FPGA实现DDS的原理图，结构清晰，采用总线方式与外部单片机通信-FPGA realization of DDS with the schematic diagram, structural clarity, the use of bus-way communication with the outside Singlechip
- 2022-04-16 10:26:17下载
- 积分：1
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farrow
该程序实现多项式分数延迟（farrow）的设计。(The program polynomial fractional delay (farrow) design.)
- 2014-12-11 10:21:39下载
- 积分：1
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C51 verilog 源代码，可以在逻辑中实现51单片机功能
C51 verilog 源代码，可以在逻辑中实现51单片机功能-C51 verilog
- 2022-08-18 06:28:41下载
- 积分：1
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TheResearchAndIPDesignOfSMBusBasedSmartBattery
本文研究了SMBus
规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下
(Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台
完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有
良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)
- 2009-03-26 12:16:53下载
- 积分：1
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jpeg_fpga
基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分：1
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基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现...
基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现
-FPGA-based design of traffic lights have Verilog HDL source code, simulation map with pin configuration map has been downloaded realize
- 2022-06-27 19:08:32下载
- 积分：1
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MIPS_LANG
说明： verilog实现misp架构，并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分：1
