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segment
This source is used to control 7 segments on FPGA boad
- 2014-11-10 13:33:13下载
- 积分:1
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FSK信号发生器,基于VHDL语言,好用的!
FSK信号发生器,基于VHDL语言,好用的!-FSK signal generator, based on the VHDL language, useful!
- 2022-06-19 14:00:10下载
- 积分:1
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altfp_matrix_mult
浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)
- 2013-12-18 15:08:36下载
- 积分:1
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FIR
本实验主要是在FPGA上实现FIR数字滤波器的功能,不仅有工程文件,还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)
- 2020-10-05 11:27:38下载
- 积分:1
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Center
使用Xilinx3S400开发的钢板检测算法中心化算法,通过测试。(a vhdl-program use Xilinx3S400)
- 2009-04-12 22:09:45下载
- 积分:1
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spartanII 是xilinx公司提供的一款高性能FGPA芯片,本文详细介绍spartanII的体系结构和编程!...
spartanII 是xilinx公司提供的一款高性能FGPA芯片,本文详细介绍spartanII的体系结构和编程!-spartanII Xilinx is provided by a high-performance chip FGPA, spartanII This paper describes the architecture and programming!
- 2022-03-03 02:06:35下载
- 积分:1
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ethernet-verilog
非常详细的千兆以太网MAC verilog代码,可以供硬件设计时有关网络的开发参考(Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference)
- 2020-09-19 11:27:57下载
- 积分:1
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spi_controller
SPI控制器,基于VERILOG描述,分模块设计,共6个模块,时钟产生模块,移位模块,主模块,从模块,定义模块,顶层模块。(SPI controller, based on the VERILOG description, sub-module design, a total of six modules, clock generation module, shift module, main module, from the modules, custom module, top module.)
- 2021-05-13 13:30:02下载
- 积分:1
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VHDL显示六位学好
在八位七段数码显示管上显示8位学号,要显示的学号可以在程序内改,经设备验证无错误,且运行良好。
- 2022-05-30 18:34:23下载
- 积分:1
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SAP
SAP-1硬件描述语言(使用Verilog语言)
- 2023-06-14 11:45:03下载
- 积分:1