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Project7_5
基于fpga状态机的交通灯设计，亮灯时间自己修改，程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)
- 2020-06-18 04:00:01下载
- 积分：1
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QMD
说明： 实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)
- 2019-05-05 15:37:58下载
- 积分：1
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or1200.tar
OpenRISC 1200 cpu with integrated patches to support ORPSOC and FuseSOC builders
- 2014-12-20 04:40:23下载
- 积分：1
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Ddiggitalfiili
数字滤波器的C语言实现，，包含高通、低通、带通滤波器
(The C language implementation of the digital filter, including the high-pass, low pass, band-pass filter)
- 2020-07-03 01:40:01下载
- 积分：1
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文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法...
文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法-Article on how to add ModelSim simulation library, including the add xilinx, altera, actel the company
- 2022-02-13 01:04:22下载
- 积分：1
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基于FPGA的相位测量原理图，通过对正弦信号过零比较进入FPGA，测量相位差。可用于测量导纳等应用中。...
基于FPGA的相位测量原理图，通过对正弦信号过零比较进入FPGA，测量相位差。可用于测量导纳等应用中。
- 2022-02-28 15:01:07下载
- 积分：1
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altera的关于对数计算的IP core。
altera的关于对数计算的IP core。-altera calculated on the logarithm of the IP core.
- 2022-09-17 13:25:03下载
- 积分：1
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testbench(xilinx)
Testbench 不仅要产生激励也就是输入，还要验证响应也就是输出。当然也可以只产生
激励，然后通过波形窗口通过人工的方法去验证波形，这种方法只能适用于小规模的设计(The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce
Incentive, and then the waveform by the waveform window by artificial means to verify, this method is only applicable to small-scale design)
- 2012-04-18 16:08:25下载
- 积分：1
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gtx_interface_ip
高速串行设计FPGA-GTX IP设置生成，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接(High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)
- 2016-09-22 09:48:00下载
- 积分：1
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3input_xor
用Hspice实现一个三输入异或门，并分析其功耗和延时。(A three input XOR gate is implemented by Hspice, and its power consumption and delay are analyzed.)
- 2018-06-12 11:06:45下载
- 积分：1
