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基于verilog的FIR滤波器程序设计（调试过的）
基于verilog的FIR滤波器程序设计（调试过的）-verilog
- 2023-07-13 23:05:04下载
- 积分：1
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8b10b
8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分：1
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LCD_game2
LCD显示超级玛丽游戏2 (LCD display Super Mario game)
- 2012-09-03 21:58:48下载
- 积分：1
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static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题（STA部分）(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分：1
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一个任意整数分频程序,采用VHDL语言编写，编译通过
一个任意整数分频程序,采用VHDL语言编写，编译通过-An arbitrary integer frequency procedure for the VHDL language, the compiler through
- 2022-02-03 15:22:59下载
- 积分：1
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Viterbi译码器IP核，可以直接编译使用
viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use
- 2023-01-24 09:35:04下载
- 积分：1
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turbo[1].tar
turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)
- 2021-01-14 17:58:46下载
- 积分：1
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dac_spi
DA9125 配置spi程序 正弦波产生(DA9125 configuration spi program sine wave generated)
- 2017-05-27 20:17:40下载
- 积分：1
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track_version2
说明： fpga实现相关滤波算法中的CSK算法，采用仿真的方式验证结果
fpga是xilinx
仿真工具是vivado2018.2
语言是verilog(The CSK algorithm is implemented in FPGA, and the results are verified by simulation
FPGA is Xilinx
The simulation tool is vivado 2018.2
Language is Verilog)
- 2021-04-29 16:08:42下载
- 积分：1
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FPGA to design in ECU, very help for engineer
FPGA to design in ECU, very help for engineer
- 2022-05-27 17:19:39下载
- 积分：1
