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Program to implement convolution of two signals.
Program to implement convolution of two signals.
- 2023-04-30 22:25:04下载
- 积分：1
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实现LMS的VHDL代码。
Implement LMS vhdl code.
- 2022-07-11 07:46:06下载
- 积分：1
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VHDL电子钟的设计
（1）用HDL设计一个多功能数字钟，包含以下主要功能：精确计时，时间可以24小时制或12小时制显示；
（2）日历：显示年月日星期；
（3）能用QuartusII软件仿真；
- 2022-08-02 23:44:59下载
- 积分：1
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CORDIC_vhdl
基于VHDL语言的CORDIC算法实现，用于计算sin(x),cos(x)等，实测可用(Based on VHDL CORDIC algorithm, used to calculate sin (x), cos (x), etc., the measured available)
- 2020-11-27 22:19:31下载
- 积分：1
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此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现.
将整个电路分为两个子模块，一个提供同步信号（H_SYNC和V_SYNC）及像素位置信息；...
此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现.
将整个电路分为两个子模块，一个提供同步信号（H_SYNC和V_SYNC）及像素位置信息；另一个接收像素位置信息，并输出颜色信号。这样便于进行图形修改，同时也容易实现- This design uses Verilog the HDL hardware language design,
realizes on the palm space development board Divides into two stature
modules the entire electric circuit, provides the synchronized signal
(H_SYNC and V_SYNC) and the picture element positional information;
Another receive picture element positional information, and output
color signal. Like this is advantageous for carries on the graph to
revise, simultaneously is also easy to realize
- 2022-04-07 13:58:38下载
- 积分：1
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联邦滤波法lianbanglvbo
联邦滤波法，毕设时写的，可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)
- 2020-12-01 18:49:26下载
- 积分：1
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Amp-diagrams_pack
Diagram and how-to-make instructions pack of 6 diferent Amplifiers
- 2010-10-24 18:40:43下载
- 积分：1
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clk_div_4
说明： Verilog代码实现四分屏，在Vivado平台下实现的，可仿真(Verilog code realizes four screens, which can be simulated under vivado platform)
- 2020-12-21 20:39:08下载
- 积分：1
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RGB_Driver
串口收发程序，成功通过仿真，可以用来学习(Serial transceiver,It is successful through simulation and can be used to learn)
- 2020-10-28 14:00:00下载
- 积分：1
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ANALYSIS-OF-ALL-GATES
ANALYSIS OF ALL GATESS
- 2013-11-12 13:33:55下载
- 积分：1
