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1-Quadrature_decoder
说明: 光栅尺FPGA调试程序,本人亲自调试保证可用(Grating ruler FPGA debugging program)
- 2019-12-31 23:23:11下载
- 积分:1
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用于实现两个数相加的vhdl代码,在相应的编译器中使用
用于实现两个数相加的vhdl代码,在相应的编译器中使用-used to achieve the two summed VHDL code, the corresponding use of compiler
- 2022-10-30 11:05:03下载
- 积分:1
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ECHO_DE2
Very good info. for RS-232 echo VHDL code .
- 2008-05-31 00:41:53下载
- 积分:1
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反设计的VHDL例子,使用QuickLogic ECLIPS
VHDL examples for counter design, use QuickLogic eclips
- 2022-08-25 05:17:29下载
- 积分:1
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FPGA测试程序SignalTap
AD9235FPGA编程 可AD采集信号 信号频谱检测 检测任意波形输入(AD9235FPGA programming allows AD to collect signal and spectrum detection and detect arbitrary waveform input.)
- 2020-11-24 20:39:34下载
- 积分:1
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nv04_context
The description header can be found in signal_processing_library.h.
- 2015-07-17 09:36:41下载
- 积分:1
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S6_VGA
1。源文件保存在src目录,QII的工程文件保存在Proj目录;
2。程序实现的功能是在VGA显示器上显示彩色条纹,共8种颜色,
可以使用嵌入式逻辑分析仪观测信号;
3。modelsim仿真文件在proj--simulation--modelsim中(1. The source file is saved in the src directory QII project file is saved in the directory Proj 2. The functionality of the program is displayed on a VGA monitor color stripes, 8 colors, you can use the embedded logic analyzer observed signals 3. the modelsim simulation files in the proj- simulation- modelsim)
- 2012-11-04 18:26:48下载
- 积分:1
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Arty-Z7-20-hdmi-out-master
说明: Arty Z7 20 HDMI output
- 2021-04-24 15:18:47下载
- 积分:1
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time_echo
GPS接收机相关器中关于积分清零模块、历元计数模块、时钟模块、以及整个相关器(accumulator、epoch counter、time base、gps baseband)
- 2015-08-28 23:47:56下载
- 积分:1
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YCbCr444_YCbCr422
FPGA YCbCr444转YCbCr422实验 很好的参考(FPGA EP4CE40F23C6 YCbCr444 turn YCbCr422 experiment)
- 2021-01-25 10:08:38下载
- 积分:1