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cppOrbitTools
tle转换为六根数的c++源代码,英文原版代码,测试可用(tle converted to six the number of c++ source code, the English original code, test available)
- 2021-03-16 10:49:21下载
- 积分:1
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xapp1014-xilinx-sdi
用fpga实现SDI,每一步都很清楚 搞视频的可以参考(Fpga realization of SDI, each step are clearly engaged in the video can refer to)
- 2020-11-10 19:19:46下载
- 积分:1
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8位数字显示的简易频率计
(1)能够测试10HZ~10MHZ的方波信号;
(2)电路输入的基准时钟为1HZ,要求测量值以8421BCD码形式输出;
(3)系统有复位键;
(4)采用分层次分模块的方法,用Verilog HDL进行设计,并对各个模块写出测试代码;
(5)具体参照说明文档(包含源代码,仿真图,测试波形,详细的设计说明)(A square wave signal capable of testing 10HZ~10MHZ;
(2) the reference clock input by the circuit is 1HZ, and the measured value is output in the form of 8421BCD code;
(3) the system has a reset key;
(4) adopt the method of layering sub sub module and design with Verilog HDL;
(5) write test simulation program.)
- 2020-12-02 02:59:26下载
- 积分:1
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ppm解码器
说明: 使用verilog实现ppm解码器,功能仿真通过,附设计说明,THU微纳电子系ic设计课大作业。(a ppm decoder written in VerilogHDL, a design document is available)
- 2020-11-26 20:09:31下载
- 积分:1
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FIFO
用verilog语言的实现FIFO存储器,以先进先出的方式处理数据(The FIFO memory is implemented in Verilog language, and data is processed in FIFO)
- 2017-07-15 09:33:21下载
- 积分:1
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fir_lms
基于FPGA的自适应滤波器的实现。采用Verilog编程,2阶滤波器。(FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.)
- 2009-04-27 12:06:25下载
- 积分:1
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BPSK
先用Matlab理论仿真,再用Verilog语言在ISE环境下编写程序,可通过手机发送指令来控制上下变频器的参数。(Firstly, we use the theory of MATLAB to simulate, and then use Verilog language to write programs in ISE environment. The parameters of up-down converter can be controlled by sending instructions from mobile phone.)
- 2020-06-19 22:40:02下载
- 积分:1
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matlab-performence
图像降噪GUI界面,用到butterworth滤波器,中值滤波器和维纳滤波器,仅供参考。(noise reduction using media filter )
- 2013-05-03 10:46:05下载
- 积分:1
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MifFileGen
VC++6.0软件生成Altera公司FPGA内部存储器ROM初始化数据mif格式文件。方便通过QuartusII导入波形等参数。强调这个是例子,生成的是一个定点的正弦数据表文件,需要用到的请自行修改源代码。(This software generates internal memory ROM initialization mif format data file for FPGA product by Altera. Facilitate the passage of the waveform parameters such as import QuartusII)
- 2013-07-19 02:32:45下载
- 积分:1
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AHB DMA verilog
兼容AMBA 2.0 的DMA源码,具有两个MASTER, 一个SLAVE,通道可配。超级经典的电路结构,可以学习或直接使用,经过验证的。
- 2022-03-16 20:13:09下载
- 积分:1