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v3
说明： mojo v3 complete eagle schematic
- 2018-02-08 22:47:52下载
- 积分：1
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IPSO
i have coding for verilogHDL and VHDL. so please i want know that coding..
- 2012-04-24 01:01:07下载
- 积分：1
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frequency divider
FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
- 2019-04-27 23:35:12下载
- 积分：1
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4-2switch
四位拨妞开关作为输入，当输入值变化时将其转化成两位输出(The four DIP Niu switch as an input, when the input value changes, be converted into two output)
- 2012-10-12 21:12:35下载
- 积分：1
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shuzizhong3
数字钟VHDL软件设计，包含多种功能，报时，12,24切换，调时(The design of VHDL digital clock software, including a variety of functions, timer, 12,24 switch, adjustable)
- 2016-05-27 11:41:22下载
- 积分：1
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Generate_4fsk
雷达信号产生4PSK简单脉冲信号很好用信号产生(Radar signal pulse signal generating 4PSK simple signal generating good)
- 2013-06-22 23:10:05下载
- 积分：1
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The_Ten_Commands_of_Excellent_Design
介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处(Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary)
- 2009-09-26 16:44:29下载
- 积分：1
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LDPC-long40rate0.5-encode-and-decode
LDPC的短码，码长为40速率为0.5的LDPC码的设计，用的是QC矩阵，压缩文件为原码部分，工程太大传不上去。(LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.)
- 2013-07-01 09:28:47下载
- 积分：1
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sp6ex5
说明： xilinx SP6系列的3-8译码器实现(Implementation of Xilinx SP6 Series 3-8 Decoder)
- 2020-06-22 21:40:01下载
- 积分：1
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4x4-Keypad
fpga的一个小程序用于3s500e 4*4键盘模块(fpga is a small program used 3s500e 4* 4 keyboard module)
- 2013-07-21 11:41:36下载
- 积分：1
