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jiaotongdeng
基于CPLD的交通灯控制,完成交通灯的功能,校错能力(CPLD-based control of traffic lights, traffic lights to complete the function, the school was wrong capacity)
- 2010-10-08 23:12:11下载
- 积分:1
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prob1
UART program for fun(UART)
- 2009-11-18 10:26:04下载
- 积分:1
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ethernet_mii_udp_1
说明: Verilog开发的,MII接口的百兆以太网UDP代码(100 megabit Ethernet UDP code of MII interface)
- 2020-03-20 16:19:21下载
- 积分:1
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Continuous_delay_control_Farrow
matlab代码,利用Farrow结构设计分数延时滤波器,滤波器阶数和个数可分别进行设置,利用最大最小准则近似(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2019-06-14 09:10:59下载
- 积分:1
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DE2_70_Control_Panel_v1.3.0
DE2-70开发板中附带的控制面板,可以读取存储器中的数据,这个可以正常连接和读取,有好几版本的,有的不能用,而这个经过我亲自测试。(DE2-70 development board comes with a control panel, you can read the data in the memory, this can be properly connected and read, there are several versions, and some can not be used, and this after I personally tested.)
- 2012-10-06 22:29:11下载
- 积分:1
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verilog
关于USB开发的verilog开发程序,非常的全面,学习FPGA开发时用得着。(About USB development verilog development process, very comprehensive, learning FPGA development time worthwhile.)
- 2013-12-26 18:29:35下载
- 积分:1
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vey2v585
该代码实现了俄罗斯方块旋转,左右移动,快速下降,计分和VGA显示等基本功能(This code realizes the basic functions of Russian square rotation, left-right movement, rapid decline, scoring and VGA display.)
- 2020-06-17 19:00:01下载
- 积分:1
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verilog_lab_solution
Verilog 实验代码。。。经典的,里面都是完整的项目文件。 ISE环境。(Verilog test code. . . Classic, which is a complete project file. ISE environment.)
- 2011-12-01 23:44:40下载
- 积分:1
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基于同步FIFO的异步串口通信发送机的设计与实现
资源描述该程序是在同步FIFO的基础上实现了异步串口通信发送机的功能,首先通过数据产生模块产生数据缓存到FIFO中,然后UATR的tx模块通过检测FIFO中的数据,并将数据发送出去。
- 2023-07-24 03:00:03下载
- 积分:1
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pps_ketiao_rb2
FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1