《数字信号处理C语言程序集》 殷福亮 宋爱军
一本非常有用的书:数字信号处理C语言程序集,作者 殷福亮,宋爱军。清晰、完整。网上提供的有些版本残缺不全,存在漏页的情况,我上传的这个经仔细检查,不存在类似问题。本书内容十分丰富,紧贴工程应用实际,非常实用。提供了大量的函数及其源代码,利于读者参考。实在是不可多大的一本好书,你值得拥有!本书的具体内容不在此赘述,大家很容易百度得到的。图书在版编目(CIP)数据数字信号处理C语程序集/殷福亮、宋爱乍主编,-沈阳:辽宁科学学技术出版社,1997.7ISBN7-5381-25213数殷…Ⅲ.C语言-数学信号-信号处理应用程序Ⅳ.TN没1.72中国版本图书馆CIP数据核字(97)第03286号辽宁科学技术出版社出版沈阳市和平区北马路1(8号邮政编码110001)地方国营新民印刷总厂印刷新华书店北京发行所发开本:787×10921/16印张:28字数:710.0001997年7月第1版1997年7月第1次印刷责任编辑:马旭东版式设计:于浪封面设计;邹君文责任校对:东戈印数:15,0(0定价:30.00元目录第一篇常用数字信号的产生第一章数字信号的产生§1.1均匀分布的随机数baaa‘·aa·a··‘s4···‘44‘4··44·····4··-···§1.2正态分布的随机数…§1.3指数分布的随机数…………·······◆÷·············:§1.4拉普拉斯( Laplace)分布的随机数单·鲁。非号。非●着鲁鲁导●·。香§1.5瑞利( Rayleigh)分布的随机数……………………………………9§1.6对数正态分布的随机数………:11§L.7柯西( Cauchy)分布的随机数………·…·.13§1.8韦伯( Weibul)分布的随机数……15§1.9爱尔朗( Erlang)分布的随机数………………17§1.10贝努里( Bernoulli1)分布的随机数………●看鲁ψ鲁曹●自●喜鲁。由看看自命曲D自看19§1.11贝努里高斯分布的随机数·●中·······甲§1.12二项式分布的随机数……§1.13泊松( Poisson)分布的随机数§1·14ARMA(pq)模型数据的产生命●·p·看D●·看·。普。··●曲也。b§1.15含有高斯白噪声的正弦组合信号的产生…………§1.16解析信号的产生………35第二篇数字信号处理第一章快速傅立叶变换…"39§1.1离散傅立叶变换……§1.2快速傅立叶变换鲁鲁··音····着·D。·协。中·咖4卡4●音备·由画口省画曲命··44§1.3基4快速傅立叶变换………●4bb●■·即·●··。···鄂甲,银●看§1.4分裂基快速傅立叶变换………………………………57§1·5实序列快速傅立叶变换(-)….°°··.·····“···。61§1.6实序列快速傅立叶变换(二)……§1.7用一个N点复序州的FFT同时计算两个N点实序列离散傅立叶变换…。b自4血者b自晶。aa·70§I.8共轭对称序列的快速傅立叶反变换73§1.9紊因子快速傅立叶变换…………………………………………80§1.10 Chirp乙-变换算法…………………………………96第二章快速离散正交变换…§2.1快速哈特莱( Hartley)变换…………………………§2.2基4快速哈待莱( Hartley)变换§2.3分裂基快速哈特莱( Hartley)变换…§2.4快速离散余弦变换……15§2.5快速离散余弦反变换…………····自··非·中中····曹...·.118§2.6N=8点快速高散余弦变换·······…··…·121§27N=8点快速离散余弦反变换●鲁鲁·香垂香●鲁§28快速离散正弦变换…………………………129§2.9快速沃尔什( Walsh)变换…133§2.10快速希尔伯特变换(一)………………鲁·鲁音辛章·看·争●·●自章·自··137§2.11快速希尔伯特变换(二)…141第三章快速卷积与相关§3.1快速卷积………………………144§3.2长序列的快速卷积……………………147§33特别长序列的快速卷积…中4·鼻●………………∵"……152§3.4快速相关…………………………………………………158第四章数字滤波器的时城和频域响应…………16341数字滤波器的频率响应b●4,4看香·……163§4.2级联型数字滤波器的频率响应………………………166s4.3数字滤波器的时域响应171§4.4直接型IR数字滤波(一)………………………………174§4.5直接型IR数字滤波(二)…………177§4.6级联型IR数字滤波§4.7并联型IR数字滤波…………………………………………185第五章IR数宇滤波器的设计………………………………189§5.1巴持沃兹和切比雪夫数字滤波器的设计……◆香音非杳D,看看§5.2任意幅庋IR数字滤波器的优化设计……………………………2082第六章FIR数字滤波器的设计……………………………227§6.1窗函数方法………………………………………227§6.2频域最小误差平方设计………238§6.3切比雪夫通近方法…………………………………242第三篇随机数字信号处理第一章经典谱佔计···:·a4a命a4264§1.1功率谱估计的周期图方法264§1.2功率谱估计的相关方法………………………………………271第二章现代谱佔计隐自·音鲁章自●·●4鲁自费●●看§2.1求解一般托布利兹方程组的莱文森算法……………………280§2.2求解对称正定方程组的乔里斯基算法…83§2.3求解尤利沃克方程的莱文森德宾算法§2.4计算ARMA模型的功率谱密度……………………………….289§2.5尤利沃克谱估计算法…………292§2.6协方差谱估计算法.·…·…297§2.7Burg谱估计算法30§2.8最大似然谱估计算法鲁t···章·。看e308第三章时频分析………….314§3.1维格纳( wigner)分布……………◆鲁毋■章鲁·●●·●非b曲。島曲…314§3.2离散小波变换…318第四章随机信号的数字滤波330§41维纳( Wiener)数字滤波…唱·喜非最330§42卡尔曼( Kalman)数字滤波…·。··●··命···◆··命·335§4.3最小均方(LMS)自适应数字滤波………341§44归一化LMS自适应数字滤波344§4.5递推最小二乘(RLS)自适应数字滤波……………………348第四篇数字图像处理第一章图像基本运算………………ss"sss352§1·1图像读取、存储与显示…§1.2图像旋转….·····鲁具··。366§1.3图像灰度级直方图的计算…………368§1.4图像二值化的固定阀值法…1.5图像二值化的自适应阀值法…·中··看辛中·鲁音·甲●·372第二章图像增强-………376§2.1图像直方图均衡…………………………376§2.2中值滤波香看春·鲁自。看●··….·········色·.···B···378§2.3图像锐化······.···········世·D“·中·中···中·;··容e·咱要382§2.4图像平滑………………………………………………………………383第三章图像边缘检测辛b鲁卡鲁中●●·§31 Roberts算子边缘检测“····.…·386§3.2拉普拉斯算子边缘检测…………………………………388§3.3 Sobel算子边缘检测………§3.4 Robinson算子边缘检测………………………392§3.5 Kirsch算子边缘检测…鲁鲁·看§3.6 Prewitt算子边缘检测第四章图像细化……………………………………………139§4.1 Hilditch细化算法看●看非。●命D看鲁●●;·着●画399§4.2 Pavlidis细化算法qq··中····.404§4.3 Rosenfeld细化算法………第五篇人工神经网络第一章神经网络模型……·…·…"·416§1.1多层感知器神经网络………………………………………………416§1.2离散 Hopfield神经网络……………………………………425§1.3连续 Hopfield神经网络……。辛b4··吾。自司b命°…·434§1.4Tank- Hopfield线性规划神经网络参考文献…●●●电·单·4是p中······鲁s自····4·●……………”442第一篇常用数字信号的产生第一章数字信号的产生§1.1均匀分布的随机数功能产生(a,b)区间上均匀分布的随机数、方法简介均匀分布的概率密度函数为,a≤x≤b0,其它通常用U(2)表示,均匀分布的均值为+2,方差为(b2产生均匀分布随机数的方法如下:首先,由给定的初值x,用混合同余法ai=(ai-1+ c)(mod M)产生(0,1)区间上的随机数y。其中a=2045,c=1,M=20;然后,通过变换x;=a(b-a)y产生(ab)区间上的随机数z三、使用说明1.子函数语句double uniform (a.b. seed)2.形参说明a—双精度实型变量。给定区间的下限。b—双精度实型变量。给定区间的上限seed—长整型指针变量。*seed为随机数的种子。四、子函数程序(文件名: uniform.c)double uniform (a, b, seed)ouble ai doubled=2045兴(兴seed)+1Seed=关seed一(兴seed/1048576)为1048576;t=(兴seed)/1048576.0;t=a-(beturn (t)五、例题产生50个0到1之间均匀分布的随机数。主函数程序(文件名: uniform.m):#include " stdio. h# includi double a, bngdouble uniform(double, double, long int *a=0.0;b-1.0;s=13579for(i=0;
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全志 F1C600完整手册
The F1C600 processor represents Allwinner’s latest achievement in mobile applications processors. The processor targets the needs of boombox markets. F1C600 processor is based on the ARM9 CPU architecture with a high degree of functional integration. F1C600 supports Full HD video playback, iAllwinnerTechnologyRevision HistoryRevision historyVersionateDescriptionV1.0NoV10,2015nitia|Re|ease∨ersⅰonF10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservedPage 3AllwinnerTechnologyRevision HistoryTable of contentsDeclaration2Revision histeD。着,着垂Table of contents.:::::.:::::1:4Chapter 1.About This Documentation361.1 Documentation overview36Chapter 2 Overview....372.1 Processor features2.1.1, CPU Architecture2.2. Memory Subsystem....................382.2.1. Boot rom382.2.2 SDRAM382.2.3. SD/MMC Interface..:::··:·.:::::..:·.:::::::::::··:382.3. System Peripheral.382.3.1. Timer.382.3.2.|NT392.3.3.CCU392.3.4.DMA,392.3.5.PWM,392.4. Display subsystem39241. Display engine…,,…...:::::392.4.2. Display output.....39F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservecPage 4AllwinnerTechnologyRevision History2.5. Video Engine26.| mage Subsystem…D看看1,翻看、·着国,着,,,面面,2.6.1.CS|4看402.6. 2 CVBS Input402. 7. Audio Subsystem2.7.1, Audio codec2.8. System Peripherals2.8.1.USB2.00TG412.8.2. KEYADC412.8.3.Tl:::::412.8.4. Digital Audio Interface.....................2.8.5.UART412.8.6.SP412.8.7.TW|422.8.8.CIR422.8.9,RSB422.8.10.OWA.422.9 Package422.10. System block Diagram43Chapter3. System..........................,443.1. Memory Mapping….453.2. CCU2463.21 Overy3.2.2, FeatureF10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservecPage 5AllwinnerTechnologyRevision History3.2.3. Functionalities Description3.23.1. System bus….:.:::..a...:::::::非3.23.2 Bus clock tree473.2.4. CCU Register List…….473.2.5. CCU Register Description483.2.5. 1 PLL CPU Control Register3.2.5.2. PLL AUDIO Control register......................493.2.5.3. PLL VIDEO Control Register503.2.5.4. PLL VE Control Register513.2.5.5. PLL DDR Control Register3.2.5.6. PLL PERIPH Control Register...............523.2.5.7. CPU Clock Source register533.2.5.8. AHB/APB/HCLKC Configuration Register543.2.5.9. Bus Clock Gating Register O.......553.2.5. 10. Bus Clock Gating Register 1................553. 2.5.11. Bus Clock Gating Register 2563.2.5.12. SDMMCO Clock Register583.2.5.13. SDMMCl Clock Register.58325.14. DAUDIO Clock Register……593.2.5.15. OWA Clock Register.........................593.2.5.16. CIR Clock Register.603.2.5.17. USBPHY Clock Register603.2.5. 18 DRAM Gating register.603.2.5. 19 BE Clock Register61F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservecPage 6AllwinnerTechnologyRevision History3.2.5.20. FE Clock Register623. 2.5.21. TCON Clock Register623.2.5.22. De-interlacer Clock Register623.2.5.23. TVE Clock Register∴633.25.24. TVD Clock Register……643.2.5.25. CSI Clock Register643.2.5.26. VE Clock Register.......653.2.5.27. AUDIO CODEC Clock Register653.2.5.28. AVS Clock Register.653.2.5.29. PLL Stable Time register 0653.2.5.30. PLL Stable Time Register 1...............................................................653.2.5.31. PLL CPU Bias register663.2.5.32. PLL AUDIO Bias Register663.2.5.33. PLL VIDEO Bias Register663.2.5. 34 PLL VE Bias Register673.2.5.35.PLL_ DDR Bias Register…..,…,…,…673.2.5.36.PLL_PER| PH Bias Register……673.2.537.PLL_ CPU Tuning Register.……683.2.5.38. PLL DDR Tuning Register683.2.5.39. PLL AUDIO Pattern Control register........................693.2.5.40. PLL VIDEO Pattern Control Register.693.2.5. 41. PLL DDR Pattern Control Register3.2.5.42. Bus Software Reset Register O..3.2.5.43. Bus Software Reset register 1F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservecPage 7AllwinnerTechnologyRevision History3.2.5.44. Bus Software Reset Register 23.2.6. Programming guidelines3.2.6.1.PLL4看3.2.6.2.BUS3.3. Timer743.3 1. Overvi翻着看743.3.2, Feature…743.3.3. Functionalities Description..743.3.3.1. Typical Applications743.3.3.2. Functional block Diagram753.3.4.Timer Register List.......................753.3.5. Timer Register Description3.3.5.1. Timer IRQ Enable Register...763.3.5.2. Timer iRQ Status Register3.3.5.3. Timer 0 Control Register3.3.5.4. Timer o Interval value register .................................3.3.5.5. Timer 0 Current Value Register3.3.5.6. Timer 1 Control Register....3.3.5.7. Timer 1 Interval value register,7933.58. Timer1 Current Value Register…....…793.3.5.9. T imer 2 Control register3.3.5.10. Timer 2 Interval value Register803.3.5. 11 Timer 2 Current Value register3.3.5. 12 AVS Counter Control Register81F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservedPage 8AllwinnerTechnologyRevision History3.3.5.13. AVS Counter O Register.81335.14. AyS Counter1 Register.,,…,;…,…,…,…813.3.5.15. AVS Counter Divisor Register….,.,,,,…,,…3.3.5.16. Watchdog irQ Enable Register.………823.3.5.17. Watchdog statusster823.3.5.18. Watchdog Control Register83335.19. Watchdog Configuration Register……,,,…833.3.5.20. Watchdog Mode register....833.3.6. Programming Guidelines843.3.6.1. Timer,,84336.2. Watchdog….…843. 4, PWM853.4.1. Overview853.4.2 Feature853.4.3. Functionalities Description853. 1. Functional Block Diagram......着,着面853.4.4. Operation Principle863. 4.4.1. PWM output pins863.4.5. PWM Register List……3.4.6. PWM Register Description.....................3.4.6.1. PWM Control Register.3.4.6.2. PWM Channel 0 Period Register883.4.6.3. PWM Channel 1 Period register893.5.NTC.90F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservedPage 9AllwinnerTechnologyRevision History3.5.1. Overview903.5.2, Feature.:..:.:::::a:::.:::.:.a..:::::.:::::903.5.3. Functionalities Description903.5.3.1. Functional Block Diagram903.5.4.Interrupt source913.5.5. INTC Register List.....................................3.5.6. INTC Register Description…923.5.6.1. Interrupt Vector Register.……923.5.6.2. Interrupt base Address register933.5.6.3. NMI Interrupt Control Register933.5.6.4. Interrupt irQ Pending register o933.5.6.5. Interrupt iRQ Pending register 1...............933.5.6.6. Interrupt Enable register o933.5.6.7. Interrupt Enable Register 1.............933.5.6.8. Interrupt Mask register 0943.5.6.9. Interrupt Mask Register 1.::::943.5.6.10. Interrupt Response Register O.......943.5.6.11. Interrupt Response Register 1943.5.6.12. Interrupt Fast Forcing register 0943.5.6.13. Interrupt Fast Forcing Register 1....................................................................953.5.6. 14 Interrupt Source Priority Register O953.5.6.15. Interrupt Source Priority Register 1...973.5.6.16. Interrupt Source priority register 21003.5.6. 17 Interrupt source priority register 3102F10600 User Manual( Revision 1.0)Copyright O2015 Allwinner Technology. Co, Ltd. All Rights ReservedPage 10
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