88E1116R_Datasheet
88E1116R_Datasheet，marvell以太网phy芯片手册，全本88E1116RM A RV E LL. Alaska Gigabit Ethernet TransceiverOVERVIEWFEATURESThe Alaska 88E1116R Gigabit Ethernet Transceiver is10/100/1000BASE-TIEEE 802.3 complianta physical layer device containing a single GigabitSupports reduced pin count GMII(RGMID)interfaceEthernet transceiver. The transceiver implements theFour RGMii timing modesEthernet physical layer portion of the 1000BASE-T,100BASE-TX. and 10base-t standards. t is manufacIntegrated mdi interface termination resistors thateliminate twelve passive componentstured using standard digital CMOS process and con-tains all the active circuitry required to implement theEnergy Detect and Energy Detect+ low powerphysical layer functions to transmit and receive data onmodesstandard Cat 5 unshielded twisted pairThree loopback modes for diagnosticsThe 88E1116R device has two regulators to generateDownshift"mode for two-pair cable installationsall required voltages. The 88E1116R device can beFully integrated digital adaptive equalizers, echopowered by a single 1.8V, 2.5V, or 3. 3V supply Alternacancellers, and crosstalk cancellerstively, if the regulators are not used, then the 88E1116RAdvanced digital baseline wander correctiondevice can be powered by a 1. 8v and 1.2V supplyAutomatic MDi/MDIX crossover at all speeds ofThe 88E1116R device incorporates the Marvell@ VirtualoperationCable Tester (VCTTM)feature, which uses TimeAutomatic polarity correctionDomain Reflectometry(TDR)technology for the remotelEEE 802. 3u compliant Auto-Negotiationidentification of potential cable malfunctions, thusSoftware programmable LEd modes including LEDreducing equipment returns and service calls. UsingtestingVCT, the alaska 88E1116R device detects and reportspotential cabling issues such as pair swaps, pair polar-Supports IEEE 1149.1 JTAGity and excessive pair skew. The device will also detectMDC/MDIO Management Interfacecable opens, shorts or any impedance mismatch in theCRC checker, packet countercable and reporting accurately within one meter the disPacket generationtance to the faultVirtual Cable Tester(VCT)The 88E1116R device integrates MDI interface terminaAuto-Calibration for MAc Interface outputstion resistors into the Phy. this resistor integrationComa Mode supportfacilitates board layout and reduces board cost byRequires a single 1.8v supplyreducing the number of extenal components. The new10 pads can be supplied with 1.8V, 2.5V, or 3. 3VMarvell calibrated resistor scheme will achieve andexceed the accuracy requirements of the IEEE 802.3Two regulators generate all required voltagesRegulator can be supplied with 1.8V,2.5V or 3.3Vreturn loss specificationsCommercial gradeThe 88E1116R device supports the reduced gmll64-Pin QFN package(RGMI)for direct connection to a MAC/Switch portThe 88E1116R device uses advanced mixed-signal processing to perform equalization, echo and crosstalkcancellation, data recovery, and error correction at agigabit per second data rate. The device achievesrobust performance in noisy environments with very lowpower dissipationThe 88E 1116R device is offered in a 64-pin QFn pack-The 88E1116R device is footprint compatible with the88E1116 device As the 88E 1116R device employs integrated MDi interface terminations, all external mDIinterface termination resistors and capacitors must beremoved when migrating from the 88E1116 to88E1116R. See 88E1116 to 88E1116R Migration Appli-cation note for more detailsCopyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 388E1116RMARVELLo Alaska Gigabit Ethernet TransceiverMagnMedia Types10/1001000Mbps88E1116R|a盖10BASEEthernet macRJ-45Device100BASE-TX1000BASE-TMAC InterfaceRGMII88E1116R Device used in Copper ApplicationDoc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellPage 4Document Classification: Proprietary InformationMarch 1. 2007. AdvanceTable of contentsSECTION 1. SIGNAL DESCRIPTION1.1 Pin Description101.1.1 Pin Type Definitions1264 Pin QFN Pin Assignment List- Alphabetical by Signal Name.……,…,,…,161.3 O State at Various Test or reset modes .mmm.,17SECtION 2. FUNCTIONAL SPECIFICATIONS2.1 Copper Media Interface..国面画192.2 MAC Interface(RGMII)4192.2.1 10/100 Mbps Functionality2.2.2 TX ER and RX ER Codingaaaaaiiaia t23Lo。 pback……………,….….….,.,…….…,…,….….……,…….……………212.3.1 MAC Interface Loopback212.3.2 Line Loopback.222.3.3 EXternal Loopback24 Synchronizing F|FQ….…,,…,…,,,,,,…,,,,,…,,,…,,,,…,……242.5 Copper Media Transmit and receive Function.man..m日a252.5.1 Transmit side Network Interface252.5.2 Encoder2.5.3 Receive Side Network Interface2.5. 4 Decoder2.6 Regulators and Power Supplies282.6.1 AVDD2.6.2 AVDDC282.6.3 AVDDR292.6.4 AVDDX2.6.5DVDD…292.6.6 VDDO26.7 VDDOR.292.7 Power Management302.7.1 Low Power Modes2.72 Low Power Operating Modes……2.7.3 RGMl Effect on Low Power modes3228Auto- Negotiation.........……33Copyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 588E1116RMARVELL Alaska Gigabit Ethernet Transceiver2.9 Downshift Feature…352.10 Advanced virtual Cable Tester362.10.1 Maximum Pe2.10.2 First Peak372.10.3 Offsetp2. 10. 4 Sample Poin2.10.5 Pulse Amplitude and Pulse Width392. 10.6 Drop Link...392.10.7 VCTTM With Link Up392.11 Data Terminal Equipment (DTE)Detect........2.12 CRC Error Counter and frame Counter412.12. 1 Enabling the crc error counter and frame counter.412.13 Packet generator412.14 MDI/MDIX Crossover422.15P。 olarity Correction..…432.16LED,,,,,,,,,,,…,…,,442.16.1 LED Polarity452.16.2 Pulse Stretching and Blinking.462. 16.3 Bi-Color LED Mixing472.16.4 Modes of Operation482.17 EEE 1149.1 Controller522.17.1 BYPASS Instruction522.17.2 SAMPLE/PRELOAD Instruction.52217.3 EXTEST Instruction552,17.4 The clamP Instruction552,17.5 The high-z Instruction552.17.6 ID CODE Instruction552.18 Interrupt.552.19 Automatic and Manual Impedance Calibration.……,…,…,…,…,…,…,……562. 19. MAC Interface calibration circuit562.19.2 MAC Interface Calibration Register Definitions2. 19.3 Changing Auto Calibration Targets2. 19. 4 Manual Settings to The Calibration Registers“““582.20 Configuring the 88E1116R Device..2.20. 1 Hardware Configuration612.20.2 Software Configuration-Management Interface632.21 Temperature sensor64Doc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellDocument Classification: Proprietary InformationMarch 1. 2007. AdvanceSECTION 3 REGISTER DESCRIPTION65SECTION 4, ELECTRICAL SPECIFICATIONS1104.1. Absolute Maximum Ratings,…,…,…,…,,…,…,…,…,…,…,,…,…,……,1104.2. Recommended Operating Conditions..,,.,……,,……1114.3. Package Thermal Information.………….……….…………1124.3.1 Thermal Conditions for 64-pin QFn Package1124. 4. Current Consumption...........面量量…1134.4.1 Current Consumption AVDD..1134.4.2 Current Consumption AVDDC..1134.4.3 Current Consumption AVDDR1144.4.4 Current Consumption AVDDX1144.4.5 Current Consumption DVDD4.4.6 Current Consumption VDDo1154.4.7 Current Consumption VDDOR1154.4.8 Current Consumption Center Tap1154.5. DC Operating Conditions1164.5.1 Non-RGMlI Digital Pins1164.5.2 Internal resistor Description4.5.3 Stub-Series Transceiver LogIc (55/.21174.5 4 EEE DC Transceiver Parameters1194.6. AC Electrical Specifications1204.6.1 Reset Timing ..1204.6.2 XTAL IN/XTAL OUT Timing1214.6.3 LED to CONFIG Timing1214.7 RGMII Interface Timing……,,…1224.7.1 RGMl AC Characteristics4.7.2 RGMII Delay Timing for different RGMiI Modes1234.8. MDC/MDIO Timing…12549. JTAG Timing…,,…1264.10.EEE AC Transceiver parameters1274.11. Latency Timing........….…1284.11.1 RGMII to 1000BASE-T Transmit Latency Timingaa“aa1284.11.2 RGMII to 100BASE-TX Transmit Latency Timing1284.11.3 RGMiI to 10BASE-T Transmit Latency Timing4. 11. 4 1000BASE-T to RGMll Receive Latency Timing1304. 11.5 100BASE-TX to RGMII Receive Latency Timing.1304.11.610 BASE-T to RGMll Receive Latency Timing……….….…………,130SECTION 5. PACKAGE MECHANICAL DIMENSIONS1315.1 64-Pin QFN Package...131Copyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 788E1116RMARVELL Alaska Gigabit Ethernet TransceiverSECTION 6. ORDER INFORMATION1336.1 Ordering Part Numbers and Package Markings1336.1.1 RoHS 5/6 Marking Example1346.1.2 RoHS 6/6 Marking Example135Doc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellPage 8Document Classification: Proprietary InformationMarch 1. 2007. AdvanceSignal DescriptionSection 1. Signal DescriptionThe 88E1116R device is a 10/100/1000BASE-T Gigabit Ethernet transceiverFigure 1: 88E1116R Device 64-Pin QFN Package(Top view)文gg9廿廿廿廿廿廿凵廿廿廿凵廿守令导好寸守哥导$85#將RX CTRL4932TSTPTRXDIO5031MDIPIORXD[51EPAD-VSS30d MDIN[O]VDDOR52290 AVDDRX CLK5328叫NCRXD[2]54AVDDRXD]5526MD|P[1VDDOR56VREF57MARVEL L③24E MDIP[2TXD0]□5823MDIN[2TXD[1]B5988E1116R22AVDDTX_CLK F6021AVDDTXD[2Top ViewMDIP[3TXD3]□62190 MDIN[3]TⅩCTRL6318□NCCONFIG[O]64CTRL18三s回口cc×O百口口艺艺安安Copyright o 2007 MarvellCONFIDENTIALDoc. No. MV-S104224-00 RevMarch1.2007. AdvanceDocument Classification: Proprietary InformationPage 988E1116RMARVELL. Alaska Gigabit Ethernet Transceiver1.1 Pin Description1.1.1 Pin Type DefinitionsPin Ty peDefinitionHInput with hysteresisVOInput and outputInput onlOutput onlPUIntemal pullPDInternal pull downOpen drain outputTri-state outputADC sink capabilityDoC. No. MV-S104224-00 RevCONFIDENTIALCopyright o 2007 MarvellPage 10Document Classification: Proprietary InformationMarch.2007. Advance
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TFT/LCD驱动IC NT35510芯片手册datasheet
TFT/LCD驱动IC、手机显示屏驱动IC-NT35510，文档详细讲解了该芯片的接口定义，以及驱动显示屏的解决方案.NOVATEKPRELIMINARYNT355105.4.2 MDD/ Link Packet Descriptions by the NT355101625.4.3 Writing Video Data to Memory Sequence.......1725.44 Writing Register Sequence...….…,…1725.4.5 Reading video Data from Memory Sequence.7735.4.6 Reading Register Sequence………,…,…,…,…,…,…,…,…,…,…,…,…,…,…,…,…,………735.4.7 Hibernation Setting-..,.,…,…T745.4.8 MDD/ Deep Standby Mode Setting-……,……,…,…,…,…,…,…,………,…,…1755.5 INTERFACE PAUSE1775. 6 DATA TRANSFER BREAK AND RECOVERY.1785.7 DISPLAY MODULE DATA TRANSFER MODES,58RGB| NTERFACE,,nn,,…,…,,,……18158.1 Genera/ Description.…,.,.,…,…1815.8.2 RGB Interface Timing Chart1825.8.3 RGB Interface Mode Set.1835.8.4 RGB Interface Bus Width Set.18759 FRAME MEMORY,……,,,191591 Configuration…....…n1915.92 Address Counter….……………,7925.9.3 Interface to Memory Write Direction.........1935.9.4 Frame Memory to Display Address Mapping.......n…1945.10 TEARING EFFECT INFORMATION1955.10.1 Tearing Effect Output Line1955.10.2 Tearing Effect Bus Trigger..........面面面面面面面aa面面看日自DB自2005.11 CHECKSUM2125.12 POWER ON/OFF SEQUENCE2145. 12. 1 Case 1-REsX line is held High or Unstable by Host at Power On..................2155. 12.2 Case 2- ResX line is held Low by host at power on...e.2165.12.3 Uncontrolled power off2765.13 PoWER LEVEL MODES wmmmmmm2175.13.1 Definition2175.13.2 Power level Mode flow chartn2185.14 RESET FUNCTION…112205.14. 1 Register Default value2205.14.2 Output or Bi- directiona/{o)Pins………,,,…,……………,…,…,,…,…………,……,………2225.14.3 Input Pins………,…,,…,…2221028/20113Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT355105.15 SLEEP OUT-COMMAND AND SELF-DIAGNOSTIC FUNCTIONS OF THE DISPLAY MODULE2235. 15. 1 Register loading Detection.....2235.15.2 Functionality Detection2245.15.3 Chip Attachment Detection…….2255.16 DISPLAY PANEL COLOR CHARACTERISTICS mmmm 2265.17 GAMMA FUNCTI0N..…,………面国面面面国面2275.18 BASIC DISPLAY MODE■日量2285.19 NSTRUCTION SETTING SEQUENCE2295.19.1 Sleep In/Out Sequence…,…,…,…,…,…,…,…,…,…,,…,…,…,…,,…2295192 Deep Standby Mode Enter/ Exit Sequence……2305.20 INSTRUCTION SETUP FLOW2315. 20.1 Initializing with the Built-in Power Supply circuits2315. 20.2 Power OFF Sequence232521 MTP WRITE SEQUENCE…….2335.22 DYNAMIC BACKLIGHT CONTROL FUNCTION234522.1 PWM Control Architecture面面面面面面a面a面面2365. 22.2 Dimming Function for LABC and Manual Brightness Control6.22. 3 Dimming Function for CABC and Force PWM Function,2445.22.4 PWM Signal Setting for CABC and LABC2455.2.5 Content Adaptive Brightness Contro/CABC)………,2475.22.6 Ambient Light Sensor and Automatic Brightness Contro(LABC)…,…,…,…,…,…,…,…,…,………2485.23 COLUMN, 1-DOT, 2-DOT, 3-DOT AND 4-DOT INVERSION (VCOM DC DRIVE2556 COMMAND DESCRIPTIONS2566.1 USER COMMAND SET256NOP0000)....,.…260SWRESET: Software Reset (0100h ...267RDDID: Read Display ID(0400h-0402h)262RDNUMED: Read Number of Errors onRDDPM: Read Display Power Mode(0A00h)............264RDDMADCT: Read Display MAdo间0B0oh),…,265RDDCOLMOD: Read Display Pixel Format0cooh)………266RDDM: Read Display image Mode间 0D00h)……,…………………………………………………………267RDDSM: Read Display signa/Mode(0E00h)……................,…………………268RDDSDR: Read Display Self-Diagnostic Result(sLPN: Sleep In(1000h)-……2701028/20114Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT35510SLPOUT: Sleep Out(100h)……,…,…,…,…,…,…,…,…,……272PTLON: Partial Display Mode On(1200h).........274NORON: Norma| Display Mode On(1300h)...............………275INVOFF: Display Inversion Off (2000h)276yvoN: Display Inversion On(2100b)….......……量道量道面道量温量量量面量面面面面目面面277ALLPOFF: All Pixel Off(2200h)278ALLPON: All Pixel On(2300h280GAMSET: Gamma Set(2600h)…,,,,,,…,282DISPOFF: Display ofi(2800b)….……....,,…,…,…,…,……,283DISPON: Display On( 2900b)284CASET: Column address set(2A00h~2A03h).……,,…285RASET: Row Address Setn287RAMWR: Memory Write(2c00h)289RAMRD: Memory290PILAR: Partial Area(3000h-3003)....∴291TEOFF: Tearing Effect Line OFF (3400h)面面面面面a面面294TEON: Tearing Effect Line ON (3500h)295MADCTL: Memory data Access Control (3600h)..............................296DMOFF: dle mode o(3800……299IDMON: ldle Mode On (3900h).......300COLMOD: Interface Pixel Format 3A00h)302RAMWRC: Memory Write Continue(3c00h)…..........……303RAMRDC: Memory Read Continue(3E00h)……,…,,…,,,…,…304STESL: Set Tearing Effect Scan Line(4400h-4401)...........305GSL: Get Scan Line(4500h-4501h),.…,…,…,…,…,…,…,…,…,…,…,,…307DPCKRGB: Display Clock in RGB Interface(4A00h)308DSTBON: Deep Standby Mode On(4F00h)BIEaIESEBBSEBSEEEE309WRPFD: Write Profile value for Display (5000h-500Fh)........................310WRDISBV: Write Display Brightness(5100h)...………311RDDISBV: Read Display Brightness(5200h)…,…312WRCTRLD: Write CTRL Display(5300h)………313RDCTRLD: Read CTRL Display value(5400h)……,.....,…....……,…,…………315WRCABO: Write Content Adaptive Brightness Contro(5500h)…………………317RDCABO: Read Content Adaptive Brightness Control(5600h)…….…,…,…,…,…,……,…,…,……………………318NRHYSTE: Write3191028/20115Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT35510WRGAMMSET: Write Gamma Setting(5800h-5807h)..eec.321RDFSVM: Read Fs Value MSBs(5A00h)...........323RDFSVE: Read Fs value lsBs(5B0h)..............….……324RDMFFSVM Read Median Filter Fs value MSBs (cooh).325RDMFFSVL: Read Median Filter Fs value LSBs(5D00h)326WRCABCMB: Write CABC minimum brightness(5E00h).,…,…,…,………,,………327RDCABCMB: Read CABC minimum brightness(5Fooh).........328WRLSCO: Write Light Sensor Compensation Coefficient value(6500h~6501h)………,……………,…,…,…………329RDLSCCM: Read Light Sensor Compensation Coefficient Value MSBs(6600h )......,.........-. 330RDLSCCL: Read Light Sensor Compensation Coefficient Value LSBsRDBWLB: Read Black/White low Bits(7000h)332RDBkX: Read Bkx (7100h)333RDBky: Read Bky(7200h)334RDWX: Read Wx( 7300b)............. e..335RDWy: Read wy(7400h)…336RDRGLB: Read Red/Green Low Bits(7500h).......337RDRx: Read Rx(7600).……338RDRy: Read Ry(7700b)..........339RDGX: Read…,,,,,,,,340RDGy: Read Gy(7900h)....................n…341RDBALE: Read blue/ color low Bits(7A00h)……n,,342RDBx: Read Bx(7B00b)-..……,,,343RDBy: Read By(7c00b),,,,.,.,.,.,.,.,.,...,.,.,.,.,.,.,.,…,…344RDAx: Read ax(7D0oh)………,…345RDAy: Read Ay(7E00h)……,…,…,…346RDDDBS: Read DDB Start(A100h-A104h347RDDDBC: Read DDB Continue(A800h-A804h)349RDFCS: Read first checksum(AA0oh)……351RDCCS: Read Continue Checksum(AF00h)-.…………352RDID1: Read iD1 value(DAooh).ee..353RDD2: Read D2 Value(DB0oh)……354RDD3: Read D3vaue( COoh)……………,……………,…………………,…3557 SPECIFICATIONS…3567.1 ABSOLUTE MAXIMUM RATINGS.3567.2 ESD PROTECTION LEVEL3561028/20116Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT355107. 3 LATCH-UP PROTECTION LEVEL3567.4 LIGHT SENSITIVITY3567. 5 DC CHARACTERISTICS3577.5.1 Basic characteristics.357752MP/ Characteristics35975.3 MDD/ Characteristics wwwwwww 3617.5. 4 Current Consumption in Standby Mode and DSTB Mode..3627.6 AC CHARACTERISTICS3637.6.1 Parallel Interface Characteristics (80-Series McU)36376.2 SerialInterface Characteristicsaaaassaaaaussuaaaaaaaaaaaaaaaaaaaa3647.6.3 12C Bus Timing Characteristics36576.4 RGB Interface Characteristics3667.6.5 MIP/DS/ Timing Characteristics3677.6.6 MDD/ Timing Characteristics........3717.6.7 Reset Input Timing3728 REFERENCE APPLICATIONS. G.…3738.1 MICROPROCESSOR INTERFACE3738. 2 CONNECTIONS WITH PANEL. m..n..37810/28/2011Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT35510REVISION HISTORYPrepareChecked ApprovedVersionContentsDatebyy0.00OriginalKevinn swDennis2010/02/12Page 9, remove 32ORGB X 480Page 10, Features, remove 32ORGB X 480 and mux descriptionVGHO VGLO for gate control signals, remove VDDIM/SSIMPage11, update power voltage rangePage 12, Block diagramPage 13 to 22Add: VDD DET, DIOPWR, PSWAP, DSWAP, VGHO, VGLO, VRGHVREFCP, CSP, CSN, LVGL, C61P, C61N, VRGH, VREF, GOUT.Remove: VDDIMSSIM. VDDELUpdate: MVDDL,VGL,VGH, Test pinsPage23, update IF tablePage 51 to 66: update SPl, M3=1 setting in figurePage 102, 103, change DSIM, DSiG bit Reg to OXB 100Page 115, 124 Add WrPFD 50h on tablePage201, modified to 480X864 memoryPage202, Remove 320x480Page204, update whole Frame memory tablePage 205, TE map to 480 lines, DOPCTR change to B100hPage207, tvdI TBDPage225, 226, update VDD in figurePage227, Modes to 7Page232, Sout update to Gout0.01Page235, Add chip attachment Detection sectionKevinSWDens2010/03/17Page237, update Gamma StructurePage255, 270, update FOSC, ExamplePage266, update KB CLEDPage272, Add inversion sectionPage273, 274, Power ArchitecturePage275, update DIOPWRVREFCP, VGMP1,VGLOPage276, update C61P/N, LVGL, VGLO, VRGH,VREFCP, DIOPWR,VGMP 1/2VGMNVGSPVGSNPage291, change name to RAMKPPage306 to 312, remove 320x 480 resolution settingPage337, 5400h Cmd add a andg bitPage385, Absolute Max Rating for MV Hv, remove VDDIMPage 386, VDDIM removePage387, Vdev value modifiedPage402, 403, Remove MVDDI in notePage406, Remove 320 X 480, update 360X640 Sout sequencePage 173 to 181, MDDI windowless packetPage377, 379, A1, A8 cmd updatePage387 to 396, VDDI to 3.3VPage362 to 37670h to 7Eh cmd default valuePage28, 29, 30, 40, 41, 42 MPU figure updatePage 12, 274 Block and power architecture update10/28/20118Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT35510Page 10, remove 36ORGB X 640, Add 480RGBx720Page 11, update GPo[3: 01pdate VGHO, VGLOge 13, update Block DiagramPage 18, update IM, GPO, VSEL, and EXB1TPage 20, update VGLO, LVGLPage 21, update VGLX,VGL REG, Remove CP6 P/NPage 23, update VDD BCPage 24, update ContACT1-4, VSSIDUMPage 25, update iF description tablePage 207, update Address CounterKevinDennis2010/0406Page 235, update Resolution DataPage 252, remove CLED VOLPage 271, remove KB CLED_ VOLPage 277, add 4 dot inversionPage 306, 308, 313, 326 resolution update, remove nHD, add 480X720Page 384, update absolute voltagePage 385, update DC specPage 386, update Note3, Note5Page 405. update resolutionPage 406. update Alignment Mark-Page10,11205,206,234,305307,312,325404, update resolutionPage 13, update Block diagramPage 17-24, update pin description(MDDI not support DSWAPUpdate TEIR, TE_L, DSTB SEL, RESX, VSEL VREF PWR 12C_SDAremove VDD BD, ENDIOVPagB104121ric data type 0x24Page 134, update eotP optionPage 175, update MDDI support typPage 176, 177, update sub frame header, link shut down packetSWDennis2010/05/18Page 179, 180, update skew calibration packet, client capability packetPage 184, update packet type is 20Page 209, 214, update tE off, output is low, tering effect bus triggerPage 241, update gamma to 10 bits settingPage 276, update 3-dots inversionPage 384 update VIH, VIL, VoH,VOLPage 388, update hibernation wake upPage 390, 392 update Note2-Remove pad chapter to application note10/28/20119Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformationNOVATEKPRELIMINARYNT35510Page 14, update block diagram of RGBBPPage 16, update WRX/SCL/2C SCL, sDI/2C SDAPage 19-25, update IM3 pin description, RGBBP(remove 12C SA1)OSC Test description, KBBC to test pinPage 21, update VREF PWr descriptionPage 26, update IM tablePage 42-44, update MPU read scriptionPage 49-52, update SPl+RGB or SPl+MDDI description0.04Page 60, update 12C AddressKevinSWDen201007/27Page 181, 182, update 16 bit SPI pause descriptionPage 187-189, update RGB figurePage 200, update TE waveform in RGB mode 2Page 237, MTP sequencePage 238-258, update one dimming control for LABC CABcremove KBBc function descriptionPage 260, update 0X04 Cmd, remove KBBC CmdPage 262, update 0XA 1,0xA8 CmdRemove all the KBBc related function registerPage11,12,190,191,219,284-287,291,304,376,remove 480RGBX 360Page 15, update MTP PWR application voltagePage 16, update CSX, RDX, DC/X, SDI, SDOPage 18, update DSWAPPage 19, correct typo for IM[3: 0]in MDDI+SCL(falling edge)Page 38&44, update typo for data format in table0.05Page 53, update read data 8-8-8-bit only in SPIKevinDenn2010/10/18Page 183, 184, update note for min porch of RGB interfacePage 232, update MTP sequence and MTP PWR voltagePage 235, 236, remove PWM ENH OE bit(keep x2Page 312, 314, update typo for BCTRL and BLPage 371, 372: update figuresPage 373: update figure, add RGB+l2CPage 374: update figures, IM settingPage 375: update figures, IM settingPage 15, update DVDD typicage 129, update typo in figure of AwERPage 194, update typo for Hsync218 add condition of irregulaoffPage 219, 255, update command name typo of 05h commandPage 228-231, update typo in figuresPage 234, update typo for ALS in figure 5. 22.10.1Page 235, update CLED VOL bit in figure 5. 22.2KevinDennis2010/12/24Page 312, 314, update typo for BCTRL bl bitsPage 316, update typo in flow chartPage 346, update description of parameterPage 355, update maximum rating for VGH, GlxPage 358, 359, update 2 lane description in conditionPage 362, update pin name typo in figure-Page 376, update typo for CRGB condition10/28/201110Version o 8With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantabilityfitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any suchinformation
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