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cadence常用原件封装库
常用的cadence封装库。电阻，电容，等等。。适合初学者。方便大家使用。
- 2021-05-06下载
- 积分：1
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C# 百度地图瓦片下载器
C#实现百度地图瓦片下载程序，欢迎试用并反馈意见核心代码请参照http://blog.csdn.net/u014124220/article/details/52729066
- 2020-11-01下载
- 积分：1
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漂亮通用界面
Qt漂亮通用界面。大部分的界面都可以用这个学习，非常漂亮哦！
- 2020-12-07下载
- 积分：1
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C++_WebService_Demon
C++_WebService_Demon,使用C++实现的基于gsoap的WebService接口程序，包含Server端和Client端
- 2021-05-06下载
- 积分：1
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STM32单片机WS2812B驱动程序灯效程序
代码主要是基于stm32开发，包括两路ws2812b初始化代码，以及呼吸灯、跑马灯、彩虹灯等灯效程序，均是用pwm+dma的方式发送数据，不占用内存，本程序已用在项目中，可稳定运行。
- 2020-11-27下载
- 积分：1
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altera公司IP核使用手册.PDF
altera公司IP核使用手册,对于学习EDA技术的学生或工程师有用A吉RAContentsChapter 1. About this MegaCore FunctionRelease informat1-1Device Family Support···Introduction.··········FeaturesOpen core plus evaluation1-3Performance···Chapter 2. Getting StartedDesign Flow衡·鲁·,看·,音番2-1Megacore Function walkthrough2-2Create a New quartus II Pi2-2Launch the mega Wizard Plug-in ManagerStep 1: Parameterize2-5Step 2: Set Up SimulationStep 3: Generate..,2-11Simulate the design2-13Compile the design2-13Pa Device2-14Set Up Licensing2-15ppend the license to yourdat file2-15Specify the License File in the Quartus II Software...2-15Example Simulation and Compilation..2-16Example quartus Ii project2-16Example simulation with Test Vectors,,,,,,2-16Chapter 3. SpecificationsyperTransport Technology Overview1HT SyStems3-2HT Flow ControlHyper Transport MegaCore Function SpecificationPhysical InterfaceSynchronization and alignment ...Protocol interfClocking Options.......HyperTransport Mega Core Function Parameters and HT Link Performance3-10Signals3-14CSR Module...3-31OpenCore plus time-Out BehaviorAppendix A. ParametersIntroduction鲁鲁鲁A-1Parameter listsDevice Family and Read Only registers···········,,,,,,,,,,A-1Base Address Registers番鲁,A-2Clocking OptionsA-3Advanced settingso March 2009 Altera corporationHyperTransport MegaCore Function User GuideAppendix B. Stratix Device Pin AssignmentsIntroductionB-1GuidelinesAppendix C. Example designGeneral descriptionAdditional informationRevision historyInto-lHow to Contact alteraInfo-1Typographic Conventions ..........Info-2Hyper Transport MegaCore Function User Guideo March 2009 Altera CorporationA吉RA1. About this MegaCore FunctionRelease InformationTable 1-1 provides information about this release of the Hyper Transport Mega CoretfunctioTable 1-1. Hyper Transport Mega Core Function Release InformationitenlDescription∨ ersion9.0Release dateMarch 2009Ordering codeIP-HTProduct ID(s)0098Vendor iD(s)6AF7Altera verifies that the current version of the quartus@ll software compiles theprevious version of each MegaCore function. Any exceptions to this verification arereported in the Mega Core lP Library release Notes and Errata. Altera does not verifycompilation with Mega Core function versions older than one releaseDevice Family SupportMegaCore functions provide either full or preliminary support for target Alteradevice families:Full support means the Mega Core function meets all functional and timingrequirements for the device family and may be used in production designsa Preliminary support means the Mega Core function meets all functionalrequirements, but may still be undergoing timing analysis for the device family;itmay be used in production designs with cautionTable 1-2 shows the level of support offered by the Hyper Transport MegaCorefunction for each of the altera device familiesTable 1-2. Device Family SupportDevice FamilySupportHard Copy Stratix@FullStratixFulStratix IIFulStratix‖GXPreliminaryStratix GXOther device familiesNo supportC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide1-2Chapter 1: About this MegaCore FunctionIntroductionIntroductionThe Hyper Transport Mega Core function implements high-speed packet transfersbetween physical(PhY) and link-layer devices, and is fully compliant with theHyperTransport l/O Link Specification, Revision 1.03. This Mega Core function allowsdesigners to interface to a wide range of Hyper TransportTm technology(hT)enableddevices quickly and easily, including network processors, coprocessors, videochipsets, and ASICsFeaturesThe Hyper Transport Mega Core function has the following features8-bit fully integrated hT end-chain interfacePacket-based protocolDual unidirectional point-to-point linksUp to 16 Gigabits per second(Gbps)throughput(8 Gbps in each direction)200, 300, and 400 MHz DDR links in Stratix and Stratix GX devices200, 300, 400, and 500 MHz ddr links in Stratix II and Stratix II GX devicesLow-swing differential signaling with 100-Q2 differential impedanceHardware verified with Hyper fransport interfaces on multiple industry standardprocessor and bridge devicesFully parameterized mega core function allows flexible, easy configurationFully optimized for the altera stratix Il, Stratix, Stratix GX, and Stratix II GXevice famillesApplication-side interface uses the Altera AtlanticTM interface standardManages Hr flow control, optimizing performance and ease of useIndependent buffering for each HT virtual channelAutomatic handling of ht ordering rulesStalling of one virtual channel does not delay other virtual channels(subject toorderingFlexible parameterized buffer sizes, allowing customization depending onsystem requirementsUser interface has independent interfaces for the HT virtual channels, allowingindependent user logic designCyclic redundancy code(crc) generation and checking to preserve data integrityIntegrated detection and response to common HT error conditions■ CRC errorsEnd-chain errorsFully integrated HT configuration space includes all required configuration spaceregisters and HT capabilities list registersHyper Transport MegaCore Function User Guideo March 2009 Altera CorporationChapter 1: About this MegaCore FunctionPerformance32-bit and 64-bit support across all base address registers bars)automatically handles all csr space accessesVerilog HDL and VHdL simulation supportOpen Core Plus EvaluationWith the Altera free Open Core Plus evaluation feature, you can perform the followingSimulate the behavior of a mcgafunction(Altera MegaCore function or AMPPmegafunction) within your systema Verify the functionality of your design, as well as quickly and easily evaluate itssize and speedGenerate time-limited device programming files for designs that includeMegaCore functionsProgram a device and verify your design in hardwareYou only need to purchase a license for the Mega Core function when you arecompletely satisfied with its functionality and performance and want to take yourdesign to productiono For more information about Open Core Plus hardware evaluation using theHyperTransport MegaCore function, refer to"Open Core Plus Time-Out Behavior"onpage 3-40 and AN 320: Open Core Plus Evaluation of megafunctionsPerformanceThe Hyper Transport Mega Core function uses 20 differential I/O pin pairs and 2single-ended I/O pins, requiring 42 pins total. Table 1-3 through Table 1-5 showtypical performance and adaptive look-up table (alut) or logic element (LE)usagefor the HyperTransport MegaCore function in Stratix II GX, Stratix IL, Stratix, andStratix GX devices respectively, using the Quartus@ II software version 7.1Table 1-3 shows the maximum supported data rates in megabits per second(Mbps)by device family and speed gradeTable 1-3. Maximum Supported Hyper Transport Data Rates (Note 1)Speed GradeDevice Family-36Stratix ll GX devices 1000 Mbps 1000 Mbps 800 MbpsNA(2)N/A(2NA(2)Stratix devices1000 Mbps 1000 Mbps 800 Mbps N/A(2)NA(2)NA(2)Stratix devicesN/A(2N/A(2)00 Mbps 800 Mbps 600 Mbps400 MbpsFlip-Chip packagesStratix devicesNA(2)NA(2)NA(2)600 Mbps400 Mbps400 Mbps(Wire Bond packagesStratix GX devicesN/A(2) N/A(2)800 Mbps 800 Mbps 600 Mbps N/A(2)Notes to table 1-3(1)Rates are per interface bit. Multiply by eight to calculate the uni-directional data rate of an 8-bit inter face(2) Devices ot this speed grade are not ottered in this device familyC March 2009 Altera CorporationHyperTransport Mega Core Function User GuideChapter 1: About this MegaCore FunctionPerformanceTable 1-4 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix II and Stratix II GX devicesTable 1-4. Hyper Transport Mega Core Function Performance in Stratix ll and Stratix ll GX DevicesParametersMemoryUserRXCombinationalHT Link InterfacePosted Non-Posted Response ClockingALUTSLogicfMAX(MHz) MAx(MHz)Buffers BuffersBuffers Option(12)Registers M4K M512 ( 3)3)Shared3.5005200120500125(4RX/TX/Ref35005200500Ref/x8Shared36005400160500>150RX/TXShared4.0006,00016150RX/TX16Shared4,1006,200500125(4)RX/TX/RefShared4.1006200500125(4Ref/TxShared4.2006400160150RX/TXNotes to table 1-4.Refer to " Clocking Options "on page 3-7 for more information about these options(2 )Other parameters(BAR configurations, etc. )vary the alut and Logic Register utilization numbers by approximately +/-200(3)Figures for -3 speed grade devices only(4) When using the Shared Rx/Tx/Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the ht frequency divided byTable 1-5 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix and Stratix GX devicesTable 1-5. Hyper Transport Mega Core Function Performance in Stratix and Stratix GX DevicesUser Interface fmaxParametersUtilizationHT Link fMAX MHz)MHZ)RXRXSpeed GradePosted Non-Posted Response Clocking Option LEsM4KBuffers BuffersBuffers)(2 Blocks.5-66Shared rx/tx/ref1240010073)100734448888Shared Ref/Tx 7, 60014400400100{3)100(3)Shared rxtx7,90016400400>125>100Shared rxtx8.900125>100168Shared Rx/T×Ref9,400124004001003)100316Shared ref/ ix9.500144001003)10073)16Shared rx/x9.700400125Notes to table 1-5:(1)Refer to Clocking Options"on page 3-7 for more information about these options(2 )Other parameters( BAR configurations etc. )vary the LE utilization by approximately +/-200 LES(3 )When using the Shared Rx/Tx/ Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the hT frequency divided by fourHyper Transport MegaCore Function User GuideC March 2009 Altera CorporationA吉RA2. Getting StartedDesign FlowTo evaluate the HyperTransport Mega Core function using the Open Core Plus feature,include these steps in your design flowObtain and install the HyperTransport Mega Core functionThe HyperTransport Mega Core function is part of the MegaCore IP Library, which isdistributed with the Quartus ii software and downloadable from the altera websitewww.altera.como For system requirements and installation instructions, refer to Quartus II InstallationLicensing for Windows and Linux Workstations on the Altera website atwww.altera.com/literature/lit-qts.ispFigure 2-1 shows the directory structure after you install the HyperTransportMegaCore function, where is the installation directory. The default installationWindows is C: altera ; on Linux it islopt/alteraFigure 2-1. Directory StructureInstallation directorypContains the Altera MegaCore IP Library and third-party IP coresalteraContains the Altera MegaCore IP LibrarycommonContains shared componentshtContains the Hyper Transport Hyper Transport Megacore function files and documentationdocContains the documentation for the Hyper Transport MegaCore functionlibContains encrypted lower-level design filesexampleContains the design example for the Hyper Transport Mega Core function2. Create a custom variation of the Hyper Transport Mega Core function3. Implement the rest of your design using the design entry method of your choice4. Use the IP functional simulation model to verify the operation of your designo For more information about Ip functional simulation models, refer to the SimulatingAltera IP in Third-Party Simulation Tools chapter in volume 3 of the Quartus II Handbook5. Use the Quartus II software to compile your designC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide2-2Chapter 2: Getting StartedMega Core Function WalkthroughIg You can also generate an Open Core Plus time-limited programming file,which you can use to verify the operation of your design in hardware6. Purchase a license for the hypertransport Mega Core functionAfter you have purchased a license for the Hyper transport mega Core functionfollow these additional steps1. Set up licensing2. Generate a programming file for the Altera device(s)on your board3. Program the Altera device(s)with the completed designMegaCore Function WalkthroughThis walkthrough explains how to create a custom variation using the AlteraHyper Transport IP Toolbench and the Quartus II software, and simulate the functionusing an ip functional simulation model and the modelsim software when you arefinished generating your custom variation of the function, you can incorporate it intoⅴ our overall projectIe IP Toolbench allows you to select only legal combinations of parameters, and warnsou of any invalid configurationsIn this walkthrough you follow these stepsCreate a New Quartus II Projecta Launch the MegaWizard Plug-in Manager■Step1: Parameterizea Step 2: Set Up Simulation■Step3: Generate■ Simulate the designTo generate a wrapper file and Ip functional simulation model using default values,omit the procedure described in"Step 1: Parameterizeon page 2-5Create a New Quartus ll ProjectCreate a new Quartus II project with the New Project Wizard, which specifies theworking directory for the project, assigns the project name, and designates the nameof the top-level design entityTo create a new project, perform the following steps1. On the Windows Start menu, select Programs> Altera> Quartus II tostart the Quartus lI software. Alternatively, you can use the Quartus II Web editionsoftware2. In the Quartus II window, on the File menu, click New Project Wizard. If you didnot turn it off previously, the New Project Wizard Introduction page appears3. On the New Project Wizard Introduction page, click NextHyper Transport MegaCore Function User Guideo March 2009 Altera Corporation
- 2020-12-05下载
- 积分：1
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MATLAB与控制系统仿真实践
MATLAB与控制系统仿真实践,适合学习自动制方向的用MATLAB进行仿真的人士学习和参考内容简介本书以 MATLAB R2007a为仿真平台,以清新、简洁的风格介绍了 MATLAB语言基础及基于 MATLAB的控制系统仿真。本书在结构上包括上下两篇共17章。上篇介绍 MATLAB语言基础,并简要介绍了 MATLAB GUI程序设计和 MATLAB的混合编程知识,共7章;下篇介绍控制系统的 MATLAB仿真,并提供了两个课程设计实例供学习参考,共10章全书结构清晰,内容翔实,图文并茂,以丰富的实例突岀实践性,通过紧密联系实际突出实用性。本书可作为自动控制等相关专业的教学参考用书,也可作为相关领域工程技术人员和研究人员的参考资料。书中 MATLAB语言的介绍较为全面,可供 MATLAB语言入门者学习参考。书中所给综合实例则对相关课程设计、毕业设计等有重要参考价值图书在版编目(CIP)数据MATLAB与控制系统仿真实践/赵广元编著.一北京北京航空航天大学出版社,2009.8( MATLAB开发实例系列图书)ISBN978-7-81124-787-9Ⅰ.M…·Ⅱ.赵…Ⅲ.①自动控制系统一计算机辅助计算一软件包, MATLAB7.4—教材②自动控制系统一计算机仿真一软件包, MATLAB7.4—教材Ⅳ.TP273TP391.9中国版本图书馆CIP数据核字(2009)第073080号MATLAB与控制系统仿真实践赵广元编著责任编辑陈守平刘亚军北京航空航天大学出版社出版发行北京市海淀区学院路37号(100191)发行部电话:(010)82317024传真:(010)82328026http://www.buaapress.comcnE-mail:bhpress@263.net北京市印刷有限公司印装各地书店经销开本:787mm×1092mm1/16印张:20字数:512千字2009年8月第1版2009年8月第1次印刷印数:5000册ISBN978-7-81124-787-9定价:34.00元前言MATLAB被称为 The Language of Technical computing,它面向理工科不同领域,功能强大、使用方便,而更大的优点在于它的高度开放性。正因如此, MATLAB在理工多个学科的仿真中成为首选工具。作者结合“ MATLAB语言与控制系统仿真”的教学实践与研究成果,以 MATLAB R2007a为系统仿真平台,以清新、简洁的风格编写了本书。1.本书结构与内容安排本书在结构上包括上下两篇。上篇为 MATLAB语言基础,共7章;下篇为控制系统的MATLAB仿真,共10章。上篇主要内容有: MATLAB环境认识与操作, MATLAB语言数据类型和运算符等基础知识, MATLAB的数学运算与符号运算, MATLAB语言的程序设计, MATLAB语言的二维图形、三维图形和符号函数的绘制等绘图基础。同时,以基于GUⅠ设计工具 GUIDE的开发为例简要介绍了 MATLAB GUI程序设计,初步介绍了 MATLAB的混合编程知识,并给出了应用 MATLAB Builder for Java进行混合编程的实例。下篇主要内容有:自动控制及其仿真概述;对 MATLAB仿真集成环境— Simulink的较全面介绍,包括基本操作与设置、子系统及封装技术和S函数的编写等高级应用;基于MATLAB的控制系统数学建模包括了不同函数模型的建立及各种系统模型之间的转换,方框图模型的连接化简等;分别从直接判定和图解判定两方面来进行控制系统的稳定性分析;对控制系统的时域分析分别从动态性能指标和稳态性能指标的分析岀发进行描述;对控制系统的根轧迹分析及基于根轨迹的系统校正;对控制系统的频域分析与基于频域法的校正;控制系统的PID控制器设计主要包括了PI控制器的作用分析及设计举例;非线性控制系统分析中首先给出了非线性特性模块的构建举例,之后分别对使用相平面法和描述函数法进行了仿真分析。各章的原理要点起提纲作用,也供回顾之用;同时对所使用的 MATLAB函数给出简明用法说明。最后一章以两个课程设计综合实例演示了实践教学中 MATLAB的系统仿真应用。2.本书的特点本书结构清晰,内容翔实,图文并茂,并突出以下三点:第一,适当扩展介绍 MATLAB。上篇对 MATLAB的介绍除尽可能满足控制系统仿真需要,直接为下篇做铺垫外,作为扩展还简要介绍了 MATLAB GUⅠ程序设计和 MATLAB的混合编程知识,这有利于读者更全面地认识 MATLAB。学生在其他课程的学习、参加竞赛以及毕业设计等活动中主动应用了这两部分内容,证明以适当的篇幅进行 MATLAB的扩展介绍是必要和有效的。第二,以丰富的实例突出实践。通篇以大量实例展示 MATLAB操作及其在控制系统仿真中的应用。各章中避免太多理论的重复讲解,而仅适当地对自动控制原理的已有结论作简要介绍。对于不同例题的分析有助于引导读者对自动控制原理的深入理解,避免仅作函数的使用介绍与举例。建议读者在使用本书时最好手头有一本自动控制原理的教材作参考第三,紧密联系实际突出应用。通过课程设计综合实例的介绍,突出仿真的实际应用,达到将书本知识与实际系统设计联系起来的目的。这两篇课程设计报告源于学生课程设计的优秀作品,经进一步整理完善而形成3.本书的适用对象本书可作为自动控制、机电一体化、计算机仿真等专业的大专院校学生和研究生的教学参考用书,也可作为自动控制相关领域工程技术人员和研究人员的参考资料。本书对 MATLAB语言的介绍较为全面,也可供学习使用 MATLAB语言参考。书中所给综合实例则对相关课程设计、毕业设计等有重要参考价值4.致谢本书成稿过程中,在结构安排方面得到陕西师范大学傅钢善教授的指点。对傅老师的指点与鼓励表示诚挚的谢意本书成稿后,东北大学人工智能与机器人硏究所潘峰博士仔细阅读了主体内容,提岀了诸多宝贵意见。作者已按照其意见进行了修改。在此表示感谢本书是西安邮电学院课程建设项目(院教[2007]26号)的部分成果。本门课程于2009年被评为校级优秀课程。这里对课程建设小组其他成员的不懈努力表示感谢,对教务处的大力支持表示感谢感谢西安邮电学院信息与控制系主任范九伦教授的鼓励与大力支持,感谢自动化实验室全体老师的无私帮助。本书编写过程中,郑祺、魏美荣、张爱妮等做了部分仿真实验工作,马宏宇、白建华、赵晓莉等做了大量资料查阅、文字校对工作,对他们的辛勤付出表示感谢最后特别感谢妻子马泓波博士的全力支持书中所有程序的源代码可在北京航空航天大学出版社(htp:/www.buaapres.com.cn/)下载中心下载。同时,北京航空航天大学出版社联合MATLAB中文论坛(http://wwwiLoveMatlab.cn)为本书设立了在线交流版块,网址http://www.ilOveMatlab.cn/forum156-1.html,有问必答!作者会第一时间在 MATLAB中文论坛勘误,也会根据读者要求陆续上传更多案例和相关知识链接,还会随着 MATLAB版本的升级增添必要的内容以满足读者的需求。希望这本不断“成长”的书能最大限度地解决您在学习、研究、工作中遇到的MATLAB控制系统仿真相关问题由于作者水平有限,加之时间仓促,书中的不足与疏忽之处,敬请读者批评指正编者2009年5月目录上篇 MATLAB语言基础第1章 MATLAB环境认识与操作1.1 MATLAB环境认识1.1.1命令窗口33351.1.2命令历史记录窗口1.1.3工作空间…1.1.4帮助窗口……………………………………………………………………………81.1.5图形窗口101.1.6编辑/调试窗口111.2 MATLAB notebook及其使用…111.2.1 MATLAB Notebook的启动121.2.2 Notebook的菜单命令…121.2.3输出单元的格式控制131.2.4使用M-book模板的技巧14本章小结14第2章 MATLAB语言基础152.1 MATLAB语言的常量与变量鲁·2.1.1 MATLAB语言的常量2.1.2 MATLAB语言的变量162.2 MATLAB语言的运算符……172.2.1算术运算符…172.2.2关系运算符172.2.3逻辑运算符…………………………………172.3 MATLAB语言的数据类型…2.3.1 MATLAB语言的数据类型概述8882.3.2稀疏矩阵2.3.3单元数组222.3.4结构数组252.4 MATLAB语言的基本语句结构………………………………………………284.1直接赋值语句282.4.2调用函数语句29本章小结29第3章 MATLAB的数值运算与符号运算基础3.1数组与矩阵的基本操作…···鲁··,鲁·,·,·,··鲁·鲁…303.1.1数组与矩阵的输入……………303.1.2数组与矩阵元素的操作343.1.3数组与矩阵的输出………………3.2 MATLAB的基本数值运算∴373.2.1算术运算3.2.2关系运算3.2.3逻辑运算433.2.4运算优先级443.3 MATLAB的基本符号运算453.3.1符号运算基本函数453.3.2符号代数方程求解463.3.3符号微积分运算483.3.4 Laplace变换及其反变换、Z变换及其反变换49本章小结∴51第4章 MATLAB语言的程序设计524.1 MATLAB语言的流程结构524.1.1if,else和 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