MIPI Alliance Specification for D-PHY
MIPI Alliance Specification for D-PHY Version 1.00.00 – 14 May 2009配合“MIPI Alliance Specification for Camera Serial Interface 2 (CSI-2)“ 一起看。http://download.csdn.net/detail/micro_st/4242724Version1.00.0014-May-2009MIPI Alliance Specification for D-PHY2 The material contained herein is not a license, either expressly or impliedly, to any IPR owned or3 controlled by any of the authors or developers of this material or MIPl. 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The use or implementation of the contents of this Document may31 involve or require the use of intellectual property rights ("IPR")including(but not limited to) patents32 patent applications, or copyrights owned by one or more parties, whether or not Members of MIPIMIPI33 does not make any search or investigation for IPR, nor does miPi require or request the disclosure of any34 IPR or claims of IPR as respects the contents of this document or otherwise35 Questions pertaining to this document, or the terms or conditions of its provision, should be addressed36 MIPI Alliance. Inc37 c/o IEEE-ISTO38 445 Hoes lane39 Piscataway, NJ0885440 Alin: Board SecretaryCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY42 Contents43 Draft Version 1.00.00-14 May 2009441 Overview1451.2 Purpose.…..,.,.,,.,..472 Terminology…2.1 Definitions162.2 Abbreviations…172.3 Acronyms51 3 D-PHY Introduction523.1 Summary of Phy functionality533.2 Mandatory Functionality················2054 4 Architecture21554.1 Lane modules…564.2 Master and slave2254.3 High Frequency Clock Generation22584.4 Clock lane data lanes and the phy-Protocol interface.224.5 Selectable Lane Options·;····················234.6 Lane Module Types4.6.1 Unidirectional Data Lane…264.6.2 Bi-directional data lanes26634.6.3 Clock lane.274.7 Configurations….7654.7.1 Unidirectional Configurations............664.7.2Bi-Dal Half-Duplex Configurations674.7.3 Mixed Data Lane configurations32Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidential111Ⅴ ersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY695.1Transmission Data Structure,………………………∴335.1.1Data unitsa勹5.1.2 Bit order Serialization and De-Serialization33725.1.3 Encoding and decoding735.1.4 Data Buffering,33745.2 Lane States and Line levels755.3 Operating Modes: Control, High-Speed, and Escape5. 4 High-Speed Data Transmission··········;·5. 41 Burst payload data785.4.2 Start-of-Transmission795.4.3End-of-transmission805.4.4 HS Data Transmission burst.365.5 Bi-directional data Lane turnaround5.6 Escape Mode41835.6.1Remote triggers42845.6.2 Low-Power data Transmission43855.6.3 Ultra-Low Power State865.6.4 Escape Mode State Machine43875.7 High-Speed Clock Transmission885. 8 Clock lane Ultra-Low Power State50959 Global Operation Timing Parameters.……5.10 System Power States56915.11 Initialization56925.12 Calibration5.13 Global Operation Flow Diagram57945.14 Data Rate Dependent Parameters(informative)955. 14.1 Parameters Containing Only UI values965. 14.2 Parameters Containing Time and Ul values59Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY5.14.3 Parameters Containing Only Time Values…………5.14.4 Parameters Containing Only Time Values That Are Not Data Rate Dependent6 Fault detection611006.1 Contention detection1016.2 Sequence Error Detection.……611026.2.1 SoT Error621036.2.2 SOT Sync Error1046.2.3 EoT Sync Error1056.2. 4 Escape Mode Entry Command error.1066.2.5 LP Transmission Sync error621076.2.6 False Control error1086.3 Protocol Watchdog Timers(informative)62l096.3.1 HS RX Timeout6.3.2HS TX Timeout………………·················+···:··:·················∴62l116.3.3Escape mode timeout62l126.3. 4 Escape Mode Silence Timeout6.3.5 Turnaround errors114 7 Interconnect and Lane Configuration.641157.1 Lane configuration1167.2 Boundary Conditions.....…647.3 Definitions………64l187.4S- parameter Specifications………….651197.5 Characterization Conditions207.6 nterconnect Specifications………1217.6.1 Differential characteristics1227. 6.2 Common-mode characteristics671237.6.3 Intra-Lane Cross-Coupling1247. 6. 4 Mode-Conversion limitsCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY1257.6.5 Inter-Lane Cross-Coupling671267. 6.6 Inter-Lane static skew1277.7 Driver and receiver Characteristics1287.7.1 Differential Characteristics1297. 7.2 Common-Mode characteristics1307.7.3 Mode-Conversion Limits1317.7.4 Inter-Lane Matching132 8 Electrical Characterislics701338.1 Driver characteristics1348.1.1 High-Speed Transmitter1358.1.2 Low-Power Transmitter1368.2 Receiver Characteristic·…············…·······…8301378.2.1 High-Speed Receiver801388.2.2Low- Power receiver.................….….821398.3 Line contention detection1408.4 Input Characteristics8441 9 High-Speed Data-Clock Timing1429.1 High-Speed Clock Timing861439.2 Forward High-Speed Data Transmission Timing871449.2.1 Data-Clock Timing Specifications1459.3 Reverse High-Speed Data Transmission Timing89146 10 Regulatory Requirements91147 Annex A Logical PHY-Protocol Inter face Description(informative)92148A 1 Signal Description149A 2 High-Speed Transmit from the Master Side150A3 High-Speed receive at the slave Sidel00151A 4 High-Speed Transmit from the Slave side152A.5 High-Speed Receive at the Master SideIOICopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY153A6 Low-Power Data Transmission102154A7 Low-Power Data Reception.103155A 8 Turn-around156 Annex B Interconnect Design Guidelines (informative)105157B. 1 Practical distances105158B 2 RF Frequency Bands: Interference.105B3 Transmission Line design160B4 Reference Layer.106161B 5 Printed-Circuit board106162B6 Flex-foils106163B 7 Series resistance106164B 8 Connectors106165 Annex C 8b9b Line Coding for D-PHY(normative)107166C 1 Line Coding Features...·············108167C.1.1Enabled Features for the Protocol108l68C 1. 2 Enabled Features for the Phy108169C2 Coding scheme170C 2.1 8b9b Coding Properties.....108171C 2.2 Data Codes: Basic Code Set……….109C.2.3 Comma Codes: Unique Exception Codes110173C 2.4 Control Codes: Regular Exception Codes…10174C.2.5 Complete Coding Scheme………175C 3 Operation with the D-PhY…11117yload: Data and Control177C.3.2 Details for Hs transmission………112178C.3.3 Details for LP Transmissionl12179C 4 Error Signal180C5 Extended PplCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialⅤ ersion1.00.0014-May-2009MIPI Alliance Specification for D-PHYl81C.6 Complete Code Set.….….l15182Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidentialv111Version1.00.0014-May-2009MIPI Alliance Specification for D-PHYl83Figures184 Figure 1 Universal Lane Module functions21185 Figure2 Two Data Lane PHY Configuration.…………23186 Figure 3 Option Selection Flow Graph4187 Figure 4 Universal Lane Module Architecture25188 Figure 5 Lane Symbol Macros and Symbols Legend189 Figure 6 All Possible Data Lane Types and a basic Unidirectional Clock lane190 Figure 7 Unidirectional Single Data Lane Configuration30191 Figure 8 Unidirectional Multiple Data Lane Configuration without LPDT∴.30192 Figure 9 Two Directions Using Two Independent Unidirectional PHYs without LPDT.........31193 Figure 10 Bidirectional Single Data Lane Configuration31194 Figure 1l Bi-directional Multiple Data Lane Configuration......32195 Figure 12 Mixed Type multiple data Lane Configuration32196 Figure 13 Line level34197 Figure 14 High-Speed Data Transmission in Bursts36198 Figure 15 TX and rX State Machines for High-Speed Data Transmission37Figure16 Turnaround Procedure.……39200 Figure 17 Turnaround State Machine40201 Figure 18 Trigger-Reset Command in Escape Mode202 Figure 19 Two Data Byte Low-Power Data Transmission Example203 Figure 20 Escape Mode State Machine204 Figure2 I Switching the Clock Lane between Clock Transmission and low- Power mode………….47205 Figure 22 High-Speed Clock Transmission State Machine49206 Figure 23 Clock Lane Ultra-Low Power State State Machine········+·+···+·4···207 Figure 24 Data Lane Module State Diagram57208 Figure 25 Clock Lane Module state diagram58209 Figure 26 Point-to-point InterconnectCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidential
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泛函分析及其在自动控制中的应用
泛函分析及其在自动控制中的应用，韩崇昭，1991控制理论所硏究的闩越,可以概括为系统分析、系统踪合建模和优化。系统分包括系统的稳定性分析能控能观性分析、鲁棒性分析等,主要是分用以描述系统行为的算子的特生。传统的分析方法是实用的但只限于某些特定的系纯类型.例如传统的枫域分忻法只阳于讨论单输入单输出约线性定常橤统,而泛函分析所提供的分析方法,有可能村包括多输入多输出线性时变系统、分和参觐线性系统,以及某忠类型的柞线性系统进行统…的处理,从而获得更加一般的论。系统的综合包插挖湖器和补偿器的设计等,使系流得以镇定或获得某种性能,这是分析的逆河题。传统的综合屴沄礻仪费时费事丶而且解决问题的范園比较狭窄:现代的综合方法倾向干构造能用计算机灾现的某些算法迭代算法或递推算法的收敏性分析,以及闭环控制的稳定性分衔等,只有借助泛图分析所提供的工其,才有可能使问题得以解决系统建撓和系统的最优控制,一般是在某些约束条件下,对某个泛函拈标进行优化的问题,这更是泛函分析研究惹围闪的问题绕上所泛函分析已渗逶到控制理论和系统科学的各个分支。“饿夯千里日,更上一层楼”,控制斑论研究者只冇掌握泛函分析这…工具,才有可能…览当令研究潮流中“群峰竞秀,万水争流"“的局面第二章代数基础鉴于工科人学亩动控制类专业研究生#不具备系统的拙象代数的知识,而泛函分析这门课程又经带涉及抽象代数的某些基本慨念,所以首先在本章对必要的代数基础知识进行简要介绍,作为学习泛函分枥的预备知识。§2.]集合与映射2.1.1集合集合是数学上最基本門概念,难以绐出确切的定义:一般说:所谓集合就是指具有其种属性的事物全体。构成集合的每个事物称为该集合的元蓊。果合也简称集,其元素也简称元集合可用列其历有元素或江明其暑性来表示如A=i1,nz,…,n},A={a:a具有属性P}如果个集合由有限多个元构成,称之为有限集;如果由无限多个元构成,称之为元限集不含汪何元素的集合称为空集记为这,只含一个元的集合称为单点集。用r∈A表示“?是4中的元”或a属于A”;用a表示a不是A中的元"哎“a不属于有两个集合A和B:若A中的所有元到为B中的元,则称为A是B的子集或A蕴含于B哎包含A,记为A≌或BA任集A必是共自身的了集,而空集又是仕意集A的子集若集A是集R的子集:而B中至少有一个元不屑于4,则称A是程的真子集,或B真包含A,记为心二BBA。若集A是集B的了集,且B也是A的子策,闻称集A与集B相等,记为A=B2这个定义也经出用作集合相等的证明方法即任取∈A,得x∈B则推知4≌B;其次任取xB证得∈小则描知B≌A;从而证明A=B。在以后的证明中,我打经常采用某些撰用符号:“"表示“所有的",“彐"表示“存在”,“→“表示“由左面的结论推出岩面的结论”“台”表示左右两面相互推出”以柴合为元素的集合秋为集类。如字={A,B,C}其中的元A,B,C均是集合,是集类。A、B两个集合的所有元素共同构成的集合称为A和B的并集,记为AUB={2:x∈A或x∈开2。1,2桌合A1,A:;…,A的并業定义为U4=A∪AU…∪4一{x:xEA,或x∈A,“x∈A}(2.1.3)A、B两个集合的公共元素构成的集合称为A和B的交集,记为A∩B={x:x∈A且芏.B〔2.I.4集合A1,A2,A的交集定义为门A=A∩A∩“∩A={x:x∈A且x∈12“且xEA}(2.!5如果集合A与集合升没有公共元家,即A∩B=C,则称A与R不相交。属于集A而不属于集B的所有元构成的集合称为A与B的差集记为AB={xgxA旦x2.⊥,5巢合A和F的对称差记为A△B-(APU(4)2.7设U是一↑特定的集合,AS;称EA为A关于U的补集.记为A此时有AUA=UA∩A=2.1蘸2..9对于集类也可以定义并、交运算。设是一个集类其元的并和交分别为U{BB∈}={z:B∈郾,使z∈B2.1.10∩{B:B∈}{x;B∈密,使r∈乃2.1.11)例211设R表示实数集,R=RXR表示实数序对(x,y)的集合,集合A={(x,g)mx;∈R固定}表示欧氏平面R2上y=m直线上的总集;所有这些集合(直线〕构成一个集类x={A:mER在此情况下,集类m的交集为∩ FRA={(0,0)},即R的坐标原点;其并集为∪v∈RA=R2{0,y):|l|>0}即除去坐标纵轴但保留坐标原点整个R2平面。前面绐出的集合运算具有如下性质〔1)幂等律:AA=A,A∩A=4;〔)交换律:AB=BJA,A∩B-B∩A;I)结合律:A∪(BU)=(4∪B)∪C,A∩(B∩C)=(A∩B)∩C;Ⅳ)分配律:4U(B∩C)=(AUB∩(AUc),A(BUC)-(Anu(A门〔V)恒等律:A∪C=A,A∩U=手AUC=[, A=另外还有一些恒等关系式Ⅵ) de morgan律:A(B)-(AB)∩AC),A(BNC)=(AB)U:A〔〕对偶律:(UAA,(∩A=UⅧ)互补律:AAU,A∩A=8下面只证明(W)和(W)其余留给读者验证W)的证明:∈A(B)∈A,(BC)∈AB且x∈C∈AB且tAr∈AB)n(4C)同理可证第二式。()的证明;*∈(∪A)=∈U,艺点UA+2A且2年A1“且卖Az∈出且x∈A」且x∈术台∈∩4:同理可证第二式渠合A和B的笛卡尔积就是由序对构成的集∈Ab∈2.1,12儿素n和b称为序对(a,b)的分量。如果两个厅对的对应分垤相等则称其相等例如,(x,y)z(n-a,且y一b般情况下,集合的笛卡尔积不叫交换次序,即AX≠xA更一般地,A1A2…**A是一组集合其笛卡尔积定义为A,=1×Azx{「rTI:AE1,2}〔2.I.132.1.2关系由集合A到集合B的一个关系配,就匙的卡尔积A×H的一个集若R=AXB.序对(a)∈R则称n与!有关系P,记为ee,关系RAX称为二元关系,周为此时其中的元由序对钩成更灬般地,若K∈]1,则称其为多元关英。例2.1.2设A一{a,b,c}B={u,b,,d,吧其笛卡尔积为AB=(,,(,b),().(,t).(bq),bb),,(冫(,),出,(qb)(qc),(,d)}如果R表示“相等关系”,则R=Yb),(c,E)}二A×F关系R4XB的定义城是A的子集,即1oia∈A:b∈,使得2..11〕其值址是郾的子集,即ange=,∈B:n∈A使得ah15倒21.3设R={(x,y):,∈R,g-2}表示一个关系,显然它是RXR的一个子粜,即面R上一条抛物线的点集。其定义域domR=R,其值域 rangeR=1={y:y:0),即l半实轴设A是灬个集台,三A×A4是某种关系下给出几种特殊二元关系的定义I)自返关系:若aA→(a,a∈R;(I)对称关系:若(,b)∈B→(b,a)EB;Ⅲ)传递关系:a,b),b)∈R=n,)∈R;Ⅳ)反对称关系:若(,b),h2n)∈→m=b;甚于以上基本的二元关系还可以定义〔V)偏序关系;若是返、传递和反对称的关系:此时称A为出R规定的编序集合;〔)全序关系:若是偏关系,H任意a,b∈A,要么(+b)∈B,要么(b,a);W)等价关系:若F是肖返、传递和对称的关系。例2.1.4设R-(,9):x,∈R,≤匚R表示平面R上包括x-9直线在内的左上半平面,它是一个二元关系:国对()!x∈R,(x,x)∈,所以R是自返的;(2)任意(,y),(,=)∈R即有“到队而有x,即:x,∈R,所以是传的(3){意(x,y),(y,)∈R,具有y,≤x,从而z=y,新以R是反称的;综合起来即证刚R是个懶序关系(即关系“≤’,或者总按偏序关系“≤”規定的R是一个偏序集合。其实,R还是一个全序关系,因为除!R编序关系外,对仁意r∈R.要么x≤,费么ysx即要么(x,y)∈界,要么(y,x)∈P例2.15设A={a,b;,d,g,R={(),(b,)仂,b),(c,q),(+b),e,c)(c,),(d,n),,n),(,4},(,b),(e,e)}4A,它是A上的一个二元关系。因为(1)!x∈A(r,x)∈R,即E是白讴的;(2)意(x,y)(y,z)∈萨即有(x,∈F即R是传递的;〔3若(x,y)(g,x)∈R,即有xy,即是反对称的;所以k是一个偏序关系。但是,为e,∈A,(e)R且(e,c)B,所以不是灬个全序关系若R实A×A是A上的一个偏序关系,则I)A的任一子集B按关系R仍是一个偏详集合,即B(BXB》∩是B上的偏序关系若B按关系R还是一个全序集合,则称其为A的个全序子集。[)设b∈4,若对x∈A均有r助,称b为A的末位元系()设a∈A若对x∈A均有Rx,称a为A的初位元Ⅳ)若b∈A对任意t∈A且l则称b为A的一个最大元素。若m∈A对任意x∈A且→=a则称a为A的一个最小元亲例2.L.6设A={7,4,23,2,5)为一有限整数粜,定义A上的一个二元关系R_{∈A,x≤y2),(4,4),(415),〔47),(4,12),(2,12)(3,3),(3,4),(35),(3;73,12),(2,2),(2,3)、(2,2(2,5),(2,7,(2,12),(5,5),(5,7〕,(苏,2)}显然,孩关系R(即“≤”),A是…个全序集合同时是A的韧位元,也是最小元:12是A的末位兀,也是最大元例2.L.725的关系星可以用图2.1.表示,共中a,即存在有向连线由x到yA的仟一子集加D一{e1b,a}按关系B仍是个偏序集合,而且此时B还是A的一个全序子集在A中按关系R,是末位元也是量大元和c均为A献最小元但A无初位元,月为e和c不存在关系R讲而,假定R是集合A上时一个编序关系,对于B4,则有M)r∈A称为由规定的B的一个上界,当且仅当图2.1.1关系R对∈B有xR。如果a是由R规定的P的一个上界,而对于由R规定的B的任意其它上界p均有aR,则称a为B的最小上界,或上确界.记为m=Lp3()a∈A称为由R规定的的一个下界,当且仅当对yr∈B有aR。如果a是由R规定的B的一个下界,而对于由R规定的B的任意其它下界A,均有山B则称t为B的最大下界或下确界,记为=infB。例2.1.8设A={z∈R:01二R为一闭区何,而B一{x∈R:.2
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