BIT
代码说明:
说明: FPGA应用状态机版,适合初学者学习状态机三段式,ASMD图的理解和翻译,以及Verilog语言的应用 最后对仿真的一些理解 其中包含HDL设计及testbench描述 根据要求设计了一个能求出一个32bit字中两个相邻0之间最大间隙的电路。(FPGA application state machine version, suitable for beginners to learn state machine three-stage, ASMD chart understanding and translation, and Verilog language application. Finally, some understanding of simulation, including HDL design and testbench description According to the requirements, a circuit is designed to find the maximum gap between two adjacent zeros in a 32 bit word.)
文件列表:
bit32.zip, 6789601 , 2020-04-28
bit32_2.zip, 6803493 , 2020-04-28
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